[PATCH v2 1/5] drivers: fpga: Add generic partial reconfiguration support

[Naresh Kumar Ravulapalli]

Support for generic FPGA partial reconfiguration (pr) is added. This
implementation could now be expanded based on individual SoC support
for the same.

Signed-off-by: Naresh Kumar Ravulapalli <nareshkumar.ravulapalli at altera.com>
---
 drivers/fpga/Kconfig |  7 +++++++
 drivers/fpga/fpga.c  | 26 ++++++++++++++++++++++++++
 include/fpga.h       |  3 +++
 3 files changed, 36 insertions(+)

diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
index 62cb77b098c..f2497eb3c87 100644
--- a/drivers/fpga/Kconfig
+++ b/drivers/fpga/Kconfig
@@ -139,6 +139,13 @@ config FPGA_LOAD_SECURE
 	  Enables the fpga loads() functions that are used to load secure
 	  (authenticated or encrypted or both) bitstreams on to FPGA.
 
+config FPGA_PR
+	bool "Support FPGA partial reconfiguration"
+	depends on FPGA
+	help
+	  This defines functions for partial reconfiguration which
+	  include the freeze controller support.
+
 config SPL_FPGA_LOAD_SECURE
 	bool "Enable loading secure bitstreams for SPL"
 	depends on SPL_FPGA
diff --git a/drivers/fpga/fpga.c b/drivers/fpga/fpga.c
index f88267e01b6..c1d10c9cad4 100644
--- a/drivers/fpga/fpga.c
+++ b/drivers/fpga/fpga.c
@@ -2,6 +2,8 @@
 /*
  * (C) Copyright 2002
  * Rich Ireland, Enterasys Networks, rireland at enterasys.com.
+ *
+ * Copyright (C) 2025 Altera Corporation <www.altera.com>
  */
 
 /* Generic FPGA support */
@@ -396,3 +398,27 @@ int fpga_compatible2flag(int devnum, const char *compatible)
 	return 0;
 }
 #endif
+
+#if CONFIG_IS_ENABLED(FPGA_PR)
+/*
+ * fpga_pr
+ *	Support partial reconfiguration
+ */
+int fpga_pr(int devnum, const char *cmd, unsigned int region)
+{
+	int ret_val = FPGA_FAIL;           /* assume failure */
+	const fpga_desc * const desc = fpga_get_desc(devnum);
+
+	if (desc) {
+		switch (desc->devtype) {
+		default:
+			printf("%s: Invalid or unsupported device type %d\n",
+			       __func__, desc->devtype);
+		}
+	} else {
+		printf("invalid device number: %d\n", devnum);
+	}
+
+	return ret_val;
+}
+#endif
diff --git a/include/fpga.h b/include/fpga.h
index 4cc44164b2f..221a7f1a21f 100644
--- a/include/fpga.h
+++ b/include/fpga.h
@@ -2,6 +2,8 @@
 /*
  * (C) Copyright 2002
  * Rich Ireland, Enterasys Networks, rireland at enterasys.com.
+ *
+ * Copyright (C) 2025 Altera Corporation <www.altera.com>
  */
 
 #include <linux/types.h>	       /* for ulong typedef */
@@ -78,6 +80,7 @@ int fpga_loadbitstream(int devnum, char *fpgadata, size_t size,
 		       bitstream_type bstype);
 int fpga_dump(int devnum, const void *buf, size_t bsize);
 int fpga_info(int devnum);
+int fpga_pr(int devnum, const char *cmd, unsigned int region);
 const fpga_desc *fpga_validate(int devnum, const void *buf,
 			       size_t bsize, char *fn);
 int fpga_compatible2flag(int devnum, const char *compatible);
-- 
2.35.3