[PATCH 04/10] ram: thead: Add initial DDR controller support for TH1520

Drew Fustini drew at pdp7.com
Sat May 24 21:16:49 CEST 2025


On Sat, Apr 26, 2025 at 04:56:58PM +0000, Yao Zi wrote:
> This patch cleans the vendor code of DDR initialization up, converts the
> driver to fit in DM framework and use a firmware[1] packaged by binman to
> ship PHY configuration.
> 
> Currently the driver is only capable of initializing the controller to
> work with dual-rank 3733MHz LPDDR4, which is shipped by 16GiB variants
> of LicheePi 4A boards and I could test with. Support for other
> configurations could be easily added later.

Thank you for this patch series. I only have the 8GB LPi4a. Do you have
any suggestions for how I can get that working?

Here is existing output at boot:

-----------------------------------------------
U-Boot SPL 2020.01-g55b713fa (Jan 12 2024 - 02:17:34 +0000)
FM[1] lpddr4x dualrank freq=3733 64bit dbi_off=n sdram init
ddr initialized, jump to uboot
it worksimage has no header

U-Boot 2020.01-g55b713fa (Jan 12 2024 - 02:17:34 +0000)

CPU:   rv64imafdcvsu
Model: T-HEAD c910 light
DRAM:  8 GiB
-----------------------------------------------

Thanks,
Drew


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