[PATCH 3/4] mtd: nand: Add support for EDO mode 1-5 to IMX6ULL platform

[Michael Nazzareno Trimarchi]

HI Fabio

On Mon, May 26, 2025 at 4:27 PM Fabio Estevam <festevam at gmail.com> wrote:
>
> On Sun, May 25, 2025 at 9:33 AM Michael Trimarchi
> <michael at amarulasolutions.com> wrote:
> >
> > The clock driver allow to burst the performance of the nand
>
> allows to boost....NAND
>

Ok

> > controller. Make changes to let it use the new clock driver
> >
> > Signed-off-by: Michael Trimarchi <michael at amarulasolutions.com>
> > ---
> >
> >  drivers/mtd/nand/raw/mxs_nand.c    | 12 ++++++++++++
> >  drivers/mtd/nand/raw/mxs_nand_dt.c |  2 +-
> >  2 files changed, 13 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/mtd/nand/raw/mxs_nand.c b/drivers/mtd/nand/raw/mxs_nand.c
> > index 80d9307cdd1..2679b6ab650 100644
> > --- a/drivers/mtd/nand/raw/mxs_nand.c
> > +++ b/drivers/mtd/nand/raw/mxs_nand.c
> > @@ -1507,8 +1507,20 @@ static void mxs_compute_timings(struct nand_chip *chip,
> >         writel(GPMI_CTRL1_CLEAR_MASK, &nand_info->gpmi_regs->hw_gpmi_ctrl1_clr);
> >         writel(ctrl1n, &nand_info->gpmi_regs->hw_gpmi_ctrl1_set);
> >
> > +       /* Clock dividers do NOT guarantee a clean clock signal on its output
>
> their output.
>
> > +        * during the change of the divide factor on i.MX6Q/UL/SX. On i.MX7/8,
> > +        * all clock dividers provide these guarantee.
>
> this guarantee

This comment coming from the kernel and I don't know if is english wrong
>
> > +        */
> > +       if (IS_ENABLED(CONFIG_MX6ULL)) {
> > +               clk_disable(nand_info->gpmi_clk);
> > +       }
>
> Please remove { } for single-line statements.

Done

>
> > +
> >         clk_set_rate(nand_info->gpmi_clk, clk_rate);
> >
> > +       if (IS_ENABLED(CONFIG_MX6ULL)) {
> > +               clk_enable(nand_info->gpmi_clk);
> > +       }
>
> Ditto.
Done

Michael


-- 
Michael Nazzareno Trimarchi
Co-Founder & Chief Executive Officer
M. +39 347 913 2170
michael at amarulasolutions.com
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