[PATCH v1 11/13] reset: stm32mp25: add stm32mp25 reset driver
Patrice CHOTARD
patrice.chotard at foss.st.com
Tue May 27 13:45:57 CEST 2025
On 5/22/25 09:10, Gabriel FERNANDEZ wrote:
>
> On 5/21/25 15:41, Patrice Chotard wrote:
>> From: Gabriel Fernandez <gabriel.fernandez at foss.st.com>
>>
>> Implement STM32MP25 reset drivers using stm32-core-reset API.
>> This reset stm32-reset-core API and will be able to use DT binding
>> index started from 0.
>>
>> This patch also moves legacy reset into stm32 directory reset.
>>
>> Signed-off-by: Gabriel Fernandez <gabriel.fernandez at foss.st.com>
>> Signed-off-by: Patrice Chotard <patrice.chotard at foss.st.com>
>> ---
>>
[...]
>> + RESET(ADC12_R, RCC_ADC12CFGR, 0, 0),
>> + RESET(ADC3_R, RCC_ADC3CFGR, 0, 0),
>> + RESET(ETH1_R, RCC_ETH1CFGR, 0, 0),
>> + RESET(ETH2_R, RCC_ETH2CFGR, 0, 0),
>> + RESET(USBH_R, RCC_USB2CFGR, 0, 0),
>
> RCC_USBHCFGR
Ok
>
> Best regards
>
> Gabriel
>
>> + RESET(USB2PHY1_R, RCC_USB2PHY1CFGR, 0, 0),
>> + RESET(USB2PHY2_R, RCC_USB2PHY2CFGR, 0, 0),
>> + RESET(USB3DR_R, RCC_USB3DRCFGR, 0, 0),
>> + RESET(USB3PCIEPHY_R, RCC_USB3PCIEPHYCFGR, 0, 0),
>> + RESET(USBTC_R, RCC_UCPDCFGR, 0, 0),
>> + RESET(ETHSW_R, RCC_ETHSWCFGR, 0, 0),
>> + RESET(SDMMC1_R, RCC_SDMMC1CFGR, 0, 0),
>> + RESET(SDMMC1DLL_R, RCC_SDMMC1CFGR, 16, 0),
>> + RESET(SDMMC2_R, RCC_SDMMC2CFGR, 0, 0),
>> + RESET(SDMMC2DLL_R, RCC_SDMMC2CFGR, 16, 0),
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