[PATCH v2] mtd: spi-nor: ids: Add support for Puyasemi flash chips

[Anshul Dalal]

On Wed Feb 4, 2026 at 7:30 PM IST, Ssunk wrote:
> Add JEDEC IDs for Puyasemi PY25F512HB, PY25F01GHB, PY25F512LC,
> and PY25F01GLC flash parts.
>
> Datasheets:
> PY25F512HB:
> https://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash%20%E8%8A%AF%E7%89%87/PY25F512HB_Datasheet_V1.2.pdf
> PY25F01GHB:
> https://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/PY25F01GHB_Datasheet_V1.1.pdf
> PY25F512LC:
> https://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/PY25F512LC_Datasheet_V1.3.pdf
> PY25F01GLC
> https://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash%20%E8%8A%AF%E7%89%87/PY25F01GLC_Datasheet_V1.0.pdf

Nit: Missing colon ':'

Otherwise the patch looks good to me,
Reviewed-by: Anshul Dalal <anshuld at ti.com>

>
> Changes in v2:
> - Rebased on latest master.
> - Dropped new CONFIG_SPI_FLASH_PUYASEMI and used existing CONFIG_SPI_FLASH_PUYA
>   as suggested by Anshul Dalal.
> - Added links to datasheets.
>
> Signed-off-by: Ssunk <ssunkkan at gmail.com>
> ---
>  drivers/mtd/spi/spi-nor-ids.c | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
>
> diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
> index b6a07fa9063..fb8a1972299 100644
> --- a/drivers/mtd/spi/spi-nor-ids.c
> +++ b/drivers/mtd/spi/spi-nor-ids.c
> @@ -323,6 +323,18 @@ const struct flash_info spi_nor_ids[] = {
>  	{ INFO
>  	 ("p25q128h", 0x856018, 0, 64 * 1024, 256,
>  	  SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
> +	{ INFO
> +	 ("py25f512hb", 0x85231a, 0, 64 * 1024, 1024,
> +	  SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
> +	{ INFO
> +	 ("py25f01ghb", 0x85231b, 0, 64 * 1024, 2048,
> +	  SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
> +	{ INFO
> +	 ("py25f512lc", 0x85631a, 0, 64 * 1024, 1024,
> +	  SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
> +	{ INFO
> +	 ("py25f01glc", 0x85631b, 0, 64 * 1024, 2048,
> +	  SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
>  #endif
>  
>  #ifdef CONFIG_SPI_FLASH_SILICONKAISER