[PATCH 3/4] ARM: stm32mp: Fix CID and semaphore check

[Patrice Chotard]

From: Gatien Chevallier <gatien.chevallier at foss.st.com>

Peripheral holding CID0 cannot be accessed, remove this completely
incorrect check. While there, fix and simplify the semaphore checking
that should be performed when the CID filtering is enabled.

Signed-off-by: Gatien Chevallier <gatien.chevallier at foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard at foss.st.com>
---
 arch/arm/mach-stm32mp/stm32mp2/rifsc.c | 24 +++++-------------------
 1 file changed, 5 insertions(+), 19 deletions(-)

diff --git a/arch/arm/mach-stm32mp/stm32mp2/rifsc.c b/arch/arm/mach-stm32mp/stm32mp2/rifsc.c
index 01ffc9f2798..0ef086bb956 100644
--- a/arch/arm/mach-stm32mp/stm32mp2/rifsc.c
+++ b/arch/arm/mach-stm32mp/stm32mp2/rifsc.c
@@ -141,27 +141,10 @@ static int rifsc_check_access(void *base, u32 id)
 	cid_reg_value = readl(base + RIFSC_RISC_PER0_CIDCFGR(id));
 	sem_reg_value = readl(base + RIFSC_RISC_PER0_SEMCR(id));
 
-	/*
-	 * First check conditions for semaphore mode, which doesn't take into
-	 * account static CID.
-	 */
-	if (cid_reg_value & CIDCFGR_SEMEN)
-		goto skip_cid_check;
-
-	/*
-	 * Skip cid check if CID filtering isn't enabled or filtering is enabled on CID0, which
-	 * corresponds to whatever CID.
-	 */
-	if (!(cid_reg_value & CIDCFGR_CFEN) ||
-	    FIELD_GET(RIFSC_RISC_SCID_MASK, cid_reg_value) == RIF_CID0)
+	/* Skip cid check if CID filtering isn't enabled */
+	if (!(cid_reg_value & CIDCFGR_CFEN))
 		goto skip_cid_check;
 
-	/* Coherency check with the CID configuration */
-	if (FIELD_GET(RIFSC_RISC_SCID_MASK, cid_reg_value) != RIF_CID1) {
-		log_debug("Invalid CID configuration for peripheral %d\n", id);
-		return -EACCES;
-	}
-
 	/* Check semaphore accesses */
 	if (cid_reg_value & CIDCFGR_SEMEN) {
 		if (!(FIELD_GET(RIFSC_RISC_SEMWL_MASK, cid_reg_value) & BIT(RIF_CID1))) {
@@ -173,6 +156,9 @@ static int rifsc_check_access(void *base, u32 id)
 			log_debug("Semaphore unavailable for peripheral %d\n", id);
 			return -EACCES;
 		}
+	} else if (FIELD_GET(RIFSC_RISC_SCID_MASK, cid_reg_value) != RIF_CID1) {
+		log_debug("Invalid CID configuration for peripheral %d\n", id);
+		return -EACCES;
 	}
 
 skip_cid_check:

-- 
2.43.0