[PATCH] net: phy: mscc: Enable RMII clock output for VSC8541 PHY

Michal Simek michal.simek at amd.com
Wed Feb 11 09:40:00 CET 2026



On 1/29/26 09:10, Pranav Tilak wrote:
> Set RMII reference clock output to enabled (1) by default for VSC8541
> PHY in RMII mode. The RMII specification requires a 50MHz reference
> clock, and many board designs expect the PHY to provide this clock to
> the MAC controller.
> 
> Previously, the driver defaulted rmii_clk_out to 0 (disabled) for all
> interface modes, which caused the PHY to not output the required 50MHz
> clock. This resulted in MAC-PHY communication failures and prevented
> network operations like DHCP from working on RMII-configured boards.
> 
> This change alligns with the hardware power-up default behavior and
> aligns with both the generic PHY driver and Linux MSCC PHY driver
> implementations.
> 
> Signed-off-by: Pranav Tilak <pranav.vinaytilak at amd.com>
> ---
>   drivers/net/phy/mscc.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/net/phy/mscc.c b/drivers/net/phy/mscc.c
> index bd9cd952975..e93996e277c 100644
> --- a/drivers/net/phy/mscc.c
> +++ b/drivers/net/phy/mscc.c
> @@ -1385,7 +1385,7 @@ static int vsc8541_config(struct phy_device *phydev)
>   		return -EINVAL;
>   	}
>   	/* Default RMII Clk Output to 0=OFF/1=ON  */
> -	rmii_clk_out = 0;
> +	rmii_clk_out = 1;
>   
>   	retval = vsc8531_vsc8541_clk_skew_config(phydev);
>   	if (retval != 0)

Applied.
M


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