[PATCH 0/5] Update DDR Configurations

[Santhosh Kumar K]

Hello Francesco,

On 11/02/26 01:24, Francesco Dolcini wrote:
> On Tue, Feb 10, 2026 at 11:42:34PM +0530, Santhosh Kumar K wrote:
>>
>>
>> On 10/02/26 23:38, Tom Rini wrote:
>>> On Tue, Feb 10, 2026 at 11:35:02PM +0530, Santhosh Kumar K wrote:
>>>> Hello Tom,
>>>>
>>>> On 03/02/26 12:05, Santhosh Kumar K wrote:
>>>>> This series updates the DDR Configurations according to the SysConfig DDR
>>>>> Configuration tool v0.10.32 for the following devices [1]
>>>>>     - AM64x EVM
>>>>>     - AM62x SK
>>>>>     - AM62x LP SK
>>>>>     - AM62Ax SK
>>>>>     - AM62Px SK
>>>>>
>>>>> Testing:
>>>>> memtester - 50% of memory for 10 loops - PASSED
>>>>>
>>>>> [1] https://dev.ti.com/tirex/content/Processor_DDR_Config_0.10.32.0000/docs/REVISION_HISTORY.html
>>>>
>>>> Gentle Ping!
>>>
>>> Is this required for v2026.04 or is v2026.07 fine? Thanks.
>>
>> It'll be good if they go in v2026.04 as these are some critical DDR
>> fixes.
> 
> Would you mind sharing what are the critical fixes? I have seen the tool
> changelog, but it would be important to have more details on the actual
> impact of those changes. It is solving instabilities of memory errors?
> If yes, in which situation? And why?

So far, I haven't seen any boot failures or memory errors (maybe haven't
hit the corner cases yet). However, some key fixes include correcting
the CA VREF calibration ranges, fixing SoC ODT FSP handling, and
disabling CA Parity by default to avoid unsupported configurations.

Plus, we added a new feature:
Support for temperature-based dynamic refresh rate.

Thanks,
Santhosh.

> 
> Francesco
> 
>