[PATCH v2 5/6] dts: qcs615-ride-u-boot.dtsi: Add reboot-mode support

[Aswin Murugan]

The PM8150 PMIC on this platform uses the older PON (Power On) register
architecture rather than dedicated SDAM regions found in newer PMIC
generations. To enable reboot-mode functionality with the unified
NVMEM-based approach, add a compatibility wrapper that exposes PON
registers through the SDAM NVMEM interface.

Add device tree configuration:
- NVMEM node with compatible "qcom,spmi-sdam" wrapping PON registers
- Uses 'ranges' property to map the PON register block at offset 0x800
- NVMEM cell at offset 0x8F (PON_SOFT_RB_SPARE register)
- 7-bit field (bits [7:1]) for reboot reason, preserving bit 0
- Mode mappings: bootloader=0x02, recovery=0x01

This wrapper allows the SDAM NVMEM driver to access PON registers
transparently, providing a unified interface for both PON-based (older)
and SDAM-based (newer) PMIC generations.

The PON_SOFT_RB_SPARE register persists across warm resets and is
automatically cleared on power cycle.

Signed-off-by: Aswin Murugan <aswin.murugan at oss.qualcomm.com>
---
 arch/arm/dts/qcs615-ride-u-boot.dtsi | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/arch/arm/dts/qcs615-ride-u-boot.dtsi b/arch/arm/dts/qcs615-ride-u-boot.dtsi
index 68fffc70fcb..50784807cf4 100644
--- a/arch/arm/dts/qcs615-ride-u-boot.dtsi
+++ b/arch/arm/dts/qcs615-ride-u-boot.dtsi
@@ -11,4 +11,30 @@
 		      <0x0 0xc0000000 0x0 0xc0000000>,
 		      <0x1 0x80000000 0x1 0x00000000>;
 	};
+
+	reboot-mode {
+		compatible = "nvmem-reboot-mode";
+		nvmem-cells = <&reboot_reason>;
+		nvmem-cell-names = "reboot-mode";
+
+		mode-bootloader = <0x02>;
+		mode-recovery   = <0x01>;
+	};
+};
+
+&pm8150_0 {
+	/* Virtual NVMEM node for PON-based reboot reason storage */
+	nvram at 800 {
+		compatible = "qcom,spmi-sdam";
+		reg = <0x800>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0x00 0x800 0x100>;
+
+		/* Reboot reason cell at PON_SOFT_RB_SPARE (0x88F) */
+		reboot_reason: reboot-reason at 8f {
+			reg = <0x8f 0x1>;
+			bits = <0x01 0x07>;
+		};
+	};
 };
-- 
2.34.1