[PATCH] spi: cadence_qspi: Disable the DAC mode in indirect read

[Michal Simek]

On 2/18/26 11:03, Begari, Padmarao wrote:
> [Public]
> 
>> From: Venkatesh Yadav Abbarapu <venkatesh.abbarapu at amd.com>
>> Sent: Wednesday, April 30, 2025 10:39 AM
>> To: u-boot at lists.denx.de; tudor.ambarus at linaro.org; j-humphreys at ti.com;
>> marex at denx.de
>> Cc: Simek, Michal <michal.simek at amd.com>; jagan at amarulasolutions.com;
>> vigneshr at ti.com; u-kumar1 at ti.com; trini at konsulko.com; seanga2 at gmail.com;
>> caleb.connolly at linaro.org; sjg at chromium.org; william.zhang at broadcom.com;
>> stefan_b at posteo.net; quentin.schulz at cherry.de; Takahiro.Kuwano at infineon.com;
>> p-mantena at ti.com; git (AMD-Xilinx) <git at amd.com>
>> Subject: [PATCH] spi: cadence_qspi: Disable the DAC mode in indirect read
>>
>> Hang has been observed on QEMU, as it starts with indac read and fills sram, but
>> after dma is triggered, it tries dac read instead (based on priority) which gets blocked.
>> Disable the DAC mode in indirect DMA read and enable back for writes as DAC
>> mode is used.
>>
>> Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu at amd.com>
> 
> Tested-by: Padmarao Begari <padmarao.begari at amd.com>

Applied.
M