[PATCH] stm32mp2: Update size of DDR entry in MMU table

[Patrick DELAUNAY]

Hi,

On 2/5/26 17:20, Patrice Chotard wrote:
> On 1GB board, in particular cases, a prefetch operation is done just above
> the 1GB boundary. The DDR size is 1GB (0x80000000 to 0xc0000000), there is
> an access on 0xc00017c0 (ie 0x800017c0).
>
> As beginning of DDR is protected by MMU until CONFIG_TEXT_BASE
> (0x80000000 to 0x84000000), it triggers the following IAC:
>
> E/TC:0   stm32_iac_itr:192 IAC exceptions [159:128]: 0x200
> E/TC:0   stm32_iac_itr:197 IAC exception ID: 137
> I/TC:
>
> DUMPING DATA FOR risaf at 420d0000
> I/TC: =====================================================
> I/TC: Status register (IAESR0): 0x11
> I/TC: -----------------------------------------------------
> I/TC: Faulty address (IADDR0): 0xc00017c0
> I/TC: =====================================================
> E/TC:0   Panic at /usr/src/debug/optee-os-stm32mp/4.0.0-gitvalid.8>
> E/TC:0   TEE load address @ 0x82000000
> E/TC:0   Call stack:
> E/TC:0    0x82007f30
> E/TC:0    0x820444b4
> E/TC:0    0x8202dc54
> E/TC:0    0x82041fe0
> E/TC:0    0x820143b8
>
> By default, in MMU table, the DDR size is set to 4GB, but not all
> STM32MP2 based board embeds 4GB, some has only 1 or 2GB of DDR.
>
> The MMU table entry dedicated to DDR need to be updated with the real
> DDR size previously read from DT.
> After relocation, in enable_caches(), update the MMU table between the
> dcache_disable() / dcache_enable() with the real DDR size.
>
> Signed-off-by: Patrice Chotard <patrice.chotard at foss.st.com>
> ---
>   arch/arm/mach-stm32mp/stm32mp2/cpu.c | 14 ++++++++++++++
>   1 file changed, 14 insertions(+)
>


Reviewed-by: Patrick Delaunay <patrick.delaunay at foss.st.com>

Thanks
Patrick