[PATCH 1/2] serial: lpuart: fix RXFE filed offset for i.MX9
Ye Li
ye.li at oss.nxp.com
Wed Feb 25 04:32:29 CET 2026
On 2/18/2026 10:59 PM, Sébastien Szymanski wrote:
> Like i.MX8 and i.MXRT, on i.MX9, the Receive RX FIFO Enable (RXFE) field
> in LPUART FIFO register is bit 3, so set FIFO_RXFE to 0x08 on i.MX9 too.
>
> Signed-off-by: Sébastien Szymanski <sebastien.szymanski at armadeus.com>
> ---
> drivers/serial/serial_lpuart.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/serial/serial_lpuart.c b/drivers/serial/serial_lpuart.c
> index 9fdb6503085d..bbce59443388 100644
> --- a/drivers/serial/serial_lpuart.c
> +++ b/drivers/serial/serial_lpuart.c
> @@ -53,7 +53,8 @@
> #define FIFO_RXSIZE_MASK 0x7
> #define FIFO_RXSIZE_OFF 0
> #define FIFO_TXFE 0x80
> -#if defined(CONFIG_ARCH_IMX8) || defined(CONFIG_ARCH_IMXRT)
> +#if defined(CONFIG_ARCH_IMX8) || defined (CONFIG_ARCH_IMX9) || \
> + defined(CONFIG_ARCH_IMXRT)
> #define FIFO_RXFE 0x08
> #else
> #define FIFO_RXFE 0x40
Previous value 0x40 is wrong for all platforms. You can directly change
it to 0x08 and remove all ARCH marcos.
Best regards,
Ye Li
>
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