[PATCH 08/10] riscv: Update linker scripts to ensure appended device tree is aligned
Leo Liang
ycliang at andestech.com
Fri Jan 16 02:27:59 CET 2026
On Thu, Jan 15, 2026 at 04:19:38PM -0600, Tom Rini wrote:
> [EXTERNAL MAIL]
>
> With commit 0535e46d55d7 ("scripts/dtc: Update to upstream version
> v1.7.2-35-g52f07dcca47c") it is now a fatal error to U-Boot if our
> device tree is not 8-byte aligned. In commit f613a6e15ef7 ("ARM: OMAP2+:
> Pad SPL binary to 8-byte alignment before DTB") Beleswar Padhi explains
> that we must have ALIGN(x) statements inside of a section to ensure that
> padding is included and not simply that the linker address counter is
> incremented. To that end, this patch:
> - Aligns the final section before _end (for U-Boot) or _image_binary_end
> (for xPL phases) by 8-bytes by adding '. = ALIGN(8);' to the final
> section before the symbol.
> - Remove a now-spurious '. = ALIGN(x);' statement that was intended to
> provide the above alignments.
> - Ensure that we do have alignment by adding an ASSERT so that when not
> aligned we fail to link (and explain why).
>
> Signed-off-by: Tom Rini <trini at konsulko.com>
> ---
> Cc: Ilias Apalodimas <ilias.apalodimas at linaro.org>
> Cc: Leo <ycliang at andestech.com>
> Cc: Marek Vasut <marek.vasut+renesas at mailbox.org>
> Cc: Richard Henderson <richard.henderson at linaro.org>
> Cc: Rick Chen <rick at andestech.com>
> ---
> arch/riscv/cpu/u-boot-spl.lds | 4 ++++
> arch/riscv/cpu/u-boot.lds | 5 +++--
> 2 files changed, 7 insertions(+), 2 deletions(-)
Reviewed-by: Leo Yu-Chi Liang <ycliang at andestech.com>
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