[PATCH 02/17] spacemit: k1: enable SPL with debug UART

Heinrich Schuchardt xypron.glpk at gmx.de
Fri Jan 23 15:51:16 CET 2026


On 1/17/26 20:01, Raymond Mao wrote:
> From: Raymond Mao <raymond.mao at riscstar.com>
> 
> Add SPL support featuring debug UART output for early boot
> diagnostics on K1 SoC.

Please, describe how to install the SPL binary to make this patch testable.

> 
> Signed-off-by: Raymond Mao <raymond.mao at riscstar.com>
> ---
>   arch/riscv/cpu/k1/Kconfig  |  2 ++
>   arch/riscv/dts/Makefile    |  1 +
>   arch/riscv/dts/k1-spl.dts  | 26 ++++++++++++++++++++++++++
>   arch/riscv/dts/k1.dtsi     |  2 +-
>   board/spacemit/k1/Makefile |  2 ++
>   board/spacemit/k1/spl.c    | 24 ++++++++++++++++++++++++
>   configs/k1_defconfig       | 21 ++++++++++++++++++++-
>   include/configs/k1.h       |  2 ++
>   8 files changed, 78 insertions(+), 2 deletions(-)
>   create mode 100644 arch/riscv/dts/k1-spl.dts
>   create mode 100644 board/spacemit/k1/spl.c
> 
> diff --git a/arch/riscv/cpu/k1/Kconfig b/arch/riscv/cpu/k1/Kconfig
> index 4b621158334..4f7a07fd8ee 100644
> --- a/arch/riscv/cpu/k1/Kconfig
> +++ b/arch/riscv/cpu/k1/Kconfig
> @@ -1,6 +1,7 @@
>   # SPDX-License-Identifier: GPL-2.0-or-later
>   #
>   # Copyright (C) 2024, Kongyang Liu <seashell11234455 at gmail.com>
> +# Copyright (C) 2025-2026, RISCStar Ltd.
>   
>   if ARCH_K1
>   
> @@ -9,6 +10,7 @@ config SPACEMIT_K1
>   	select BINMAN
>   	select ARCH_EARLY_INIT_R
>   	select SYS_CACHE_SHIFT_6
> +	select SUPPORT_SPL
>   	imply CPU
>   	imply CPU_RISCV
>   	imply RISCV_TIMER if (RISCV_SMODE || SPL_RISCV_SMODE)
> diff --git a/arch/riscv/dts/Makefile b/arch/riscv/dts/Makefile
> index 9b347fc3b50..e942ef95142 100644
> --- a/arch/riscv/dts/Makefile
> +++ b/arch/riscv/dts/Makefile
> @@ -1,5 +1,6 @@
>   # SPDX-License-Identifier: GPL-2.0+
>   
> +dtb-$(CONFIG_ARCH_K1) += k1-spl.dtb
>   dtb-$(CONFIG_TARGET_ANDES_AE350) += ae350_32.dtb ae350_64.dtb
>   dtb-$(CONFIG_TARGET_ANDES_VOYAGER) += qilai-voyager.dtb
>   dtb-$(CONFIG_TARGET_BANANAPI_F3) += k1-bananapi-f3.dtb
> diff --git a/arch/riscv/dts/k1-spl.dts b/arch/riscv/dts/k1-spl.dts
> new file mode 100644
> index 00000000000..6018ea1e452
> --- /dev/null
> +++ b/arch/riscv/dts/k1-spl.dts

Why do you introduce this file?
Can't we use dts/upstream/src/riscv/spacemit/k1-bananapi-f3.dts

> @@ -0,0 +1,26 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
> +/*
> + * Copyright (C) 2023-2026 Spacemit, Inc
> + * Copyright (C) 2025-2026 RISCStar Ltd.
> + */
> +
> +/dts-v1/;
> +#include "k1.dtsi"
> +#include "binman.dtsi"
> +
> +/ {
> +	model = "spacemit k1 spl";
> +
> +	chosen {
> +		stdout-path = "serial0:115200n8";
> +		bootph-all;

The target should be to inherit bootph-all from the Linux kernel tree.

Until you you have this upstream you could add the bootph-all properties 
to arch/riscv/dts/k1-bananapi-f3-u-boot.dtsi

Best regards

Heinrich

> +	};
> +};
> +
> +&soc {
> +	bootph-all;
> +	serial at d4017000 {
> +		status = "okay";
> +		bootph-all;
> +	};
> +};
> diff --git a/arch/riscv/dts/k1.dtsi b/arch/riscv/dts/k1.dtsi
> index a633e43da32..9c203eb4b79 100644
> --- a/arch/riscv/dts/k1.dtsi
> +++ b/arch/riscv/dts/k1.dtsi
> @@ -318,7 +318,7 @@
>   		};
>   	};
>   
> -	soc {
> +	soc: soc {
>   		compatible = "simple-bus";
>   		interrupt-parent = <&plic>;
>   		#address-cells = <2>;
> diff --git a/board/spacemit/k1/Makefile b/board/spacemit/k1/Makefile
> index 2168698402b..7bce47bac8c 100644
> --- a/board/spacemit/k1/Makefile
> +++ b/board/spacemit/k1/Makefile
> @@ -1,5 +1,7 @@
>   # SPDX-License-Identifier: GPL-2.0-or-later
>   #
>   # Copyright (c) 2024, Kongyang Liu <seashell11234455 at gmail.com>
> +# Copyright (c) 2025-2026, RISCStar Ltd.
>   
>   obj-y := board.o
> +obj-$(CONFIG_SPL_BUILD) += spl.o
> diff --git a/board/spacemit/k1/spl.c b/board/spacemit/k1/spl.c
> new file mode 100644
> index 00000000000..11a097389f1
> --- /dev/null
> +++ b/board/spacemit/k1/spl.c
> @@ -0,0 +1,24 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +/*
> + * Copyright (c) 2025-2026, RISCStar Ltd.
> + */
> +
> +#include <spl.h>
> +
> +void board_init_f(ulong dummy)
> +{
> +	int ret;
> +
> +	ret = spl_early_init();
> +	if (ret)
> +		panic("spl_early_init() failed:%d\n", ret);
> +
> +	riscv_cpu_setup();
> +
> +	preloader_console_init();
> +}
> +
> +u32 spl_boot_device(void)
> +{
> +	return BOOT_DEVICE_NONE;
> +}
> diff --git a/configs/k1_defconfig b/configs/k1_defconfig
> index 0bdc3c800f0..f1a16735943 100644
> --- a/configs/k1_defconfig
> +++ b/configs/k1_defconfig
> @@ -3,7 +3,19 @@ CONFIG_SYS_MALLOC_LEN=0x1000000
>   CONFIG_NR_DRAM_BANKS=2
>   CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
>   CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000000
> -CONFIG_DEFAULT_DEVICE_TREE="k1-bananapi-f3"
> +CONFIG_DEFAULT_DEVICE_TREE="k1-spl"
> +CONFIG_SPL=y
> +CONFIG_SPL_TEXT_BASE=0xC0801000
> +CONFIG_SPL_MAX_SIZE=0x33000
> +CONFIG_SPL_BSS_START_ADDR=0xC0837000
> +CONFIG_SPL_BSS_MAX_SIZE=0x2000
> +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
> +CONFIG_SPL_HAVE_INIT_STACK=y
> +CONFIG_SPL_STACK=0xC0840000
> +CONFIG_SPL_SIZE_LIMIT=0x31000
> +CONFIG_SPL_FIT_SIGNATURE=y
> +CONFIG_SPL_LOAD_FIT_ADDRESS=0x08000000
> +CONFIG_STACK_SIZE=0x100000
>   CONFIG_SYS_BOOTM_LEN=0xa000000
>   CONFIG_SYS_LOAD_ADDR=0x200000
>   CONFIG_ARCH_RV64I=y
> @@ -23,3 +35,10 @@ CONFIG_PINCTRL_SINGLE=y
>   CONFIG_RESET_SPACEMIT_K1=y
>   CONFIG_SYS_NS16550=y
>   CONFIG_SYS_NS16550_MEM32=y
> +CONFIG_DEBUG_UART=y
> +CONFIG_DEBUG_UART_BASE=0xD4017000
> +CONFIG_DEBUG_UART_CLOCK=14700000
> +CONFIG_DEBUG_UART_SHIFT=2
> +CONFIG_DEBUG_UART_NS16550=y
> +CONFIG_DEBUG_UART_ANNOUNCE=y
> +# CONFIG_DEBUG_SBI_CONSOLE is not set
> diff --git a/include/configs/k1.h b/include/configs/k1.h
> index 97cf4d72df0..6a26fdfcebe 100644
> --- a/include/configs/k1.h
> +++ b/include/configs/k1.h
> @@ -7,6 +7,8 @@
>   #ifndef __CONFIG_H
>   #define __CONFIG_H
>   
> +#define CFG_SYS_NS16550_CLK	    14700000
> +
>   #define CFG_SYS_SDRAM_BASE         0x0
>   #define CFG_SYS_NS16550_IER        0x40 /* UART Unit Enable */
>   



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