[PATCH] arm: spl: Fix DTB offset after binman symbol table
Ilias Apalodimas
ilias.apalodimas at linaro.org
Mon Jan 26 07:28:55 CET 2026
Hi Tom, Fabio
On Sat, 24 Jan 2026 at 02:13, Fabio Estevam <festevam at gmail.com> wrote:
>
> Hi Tom,
>
> On Fri, Jan 23, 2026 at 5:12 PM Tom Rini <trini at konsulko.com> wrote:
>
> > I've been talking with Ilias for the last few hours. This still isn't
> > right, it just happens to work in some cases, but not others. What's
> > going on is that while we always have u-boot-nodtb.bin 8-byte aligned
> > because while the BSS itself may end 8 byte aligned, we actually care
> > about the size of the BSS being 8 byte aligned. Can you please try:
> >
> > diff --git a/arch/arm/cpu/u-boot-spl.lds b/arch/arm/cpu/u-boot-spl.lds
> > index d780a5060774..dae8a1ec665b 100644
> > --- a/arch/arm/cpu/u-boot-spl.lds
> > +++ b/arch/arm/cpu/u-boot-spl.lds
> > @@ -58,6 +58,7 @@ SECTIONS
> > _end = .;
> >
> > .bss __rel_dyn_start (OVERLAY) : {
> > + . = ALIGN(8);
> > __bss_start = .;
> > *(.bss*)
> > . = ALIGN(8);
> >
I think the reason this is happening is that we *force* thje rel.dyn
alignment now, and as a result we create the section. That section
might be 0 or 4 bytes depending on the layout and that'w hy adding
ALIGN() commands at various places fiorx the problem.
For 'fun',can you force a -dirty compilation of your broken tree? The
update of version_string[], which lives in .rodata will update the
alignment of your bss_end and the binary will start working...
## readelf before 8b0ebe054bb3 (no rel.dyn present)
Section Headers:
[Nr] Name Type Addr Off Size ES Flg Lk Inf Al
[ 0] NULL 00000000 000000 000000 00 0 0 0
[ 1] .text PROGBITS 00000000 001000 0086e0 00 AX 0 0 32
[ 2] .rodata PROGBITS 000086e0 0096e0 001d6e 00 A 0 0 4
[ 3] .data PROGBITS 0000a450 00b450 000538 00 WA 0 0 4
[ 4] __u_boot_list PROGBITS 0000a988 00b988 000798 00 WA 0 0 4
[ 5] .binman_sym_table PROGBITS 0000b120 00c120 000014 00 WA 0 0 4
[ 6] .bss PROGBITS 0000b134 00c134 000054 00 W 0 0 4
[...]
## readelf after 8b0ebe054bb3
Section Headers:
[Nr] Name Type Addr Off Size ES Flg Lk Inf Al
[ 0] NULL 00000000 000000 000000 00 0 0 0
[ 1] .text PROGBITS 00000000 001000 008848 00 AX 0 0 32
[ 2] .rodata PROGBITS 00008848 009848 001dfd 00 A 0 0 4
[ 3] .data PROGBITS 0000a648 00b648 000530 00 WA 0 0 4
[ 4] __u_boot_list PROGBITS 0000ab78 00bb78 000798 00 WA 0 0 4
[ 5] .binman_sym_table PROGBITS 0000b310 00c310 000014 00 WA 0 0 4
[ 6] .rel.dyn REL 0000b324 00c324 000004 08 A 0 0 4
[ 7] .bss PROGBITS 0000b324 00c328 000054 00 W 0 0 4
[...]
Fabio can you please try this
diff --git a/arch/arm/cpu/u-boot-spl.lds b/arch/arm/cpu/u-boot-spl.lds
index d780a5060774..af9f3a3c39c0 100644
--- a/arch/arm/cpu/u-boot-spl.lds
+++ b/arch/arm/cpu/u-boot-spl.lds
@@ -51,8 +51,8 @@ SECTIONS
__rel_dyn_start = .;
*(.rel*)
__rel_dyn_end = .;
- . = ALIGN(8);
}
+ . = ALIGN(8);
_image_binary_end = .;
_end = .;
--
Cheers
/Ilias
> > And see if it works at run time? hexdump'ing looks good. If so, I'll do
> > something more broad to catch the SPL_SEPARATE_BSS=n case, and add the
> > ASSERTS that are missing.
>
> This fixes the boot on RV1103, thanks!
>
> When you send a formal patch, feel free to add:
>
> Reported-by: Fabio Estevam <festevam at gmail.com>
> Tested-by: Fabio Estevam <festevam at gmail.com>
>
> Thanks
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