[PATCH v5 1/2] Add CoreCourse socfpga Board AC501

[Chee, Tien Fong]

Hi Brian,

On 27/1/2026 10:42 pm, Brian Sune wrote:
> [CAUTION: This email is from outside your organization. Unless you trust the sender, do not click on links or open attachments as it may be a fraudulent email attempting to steal your information and/or compromise your computer.]
>
> CoreCourse Altera GEN5 Cyclone V board
> do support different size and formfactor.
> Now introducing AC501 C5 to mainstream u-boot
> This is a UBGA-484 based board with basic
> feature. More info on [1]
>
> [1] https://corecourse.cn/forum.php?mod=viewthread&tid=27704&highlight=AC501
>
> Signed-off-by: Brian Sune <briansune at gmail.com>
> ---
>   arch/arm/dts/Makefile                         |   1 +
>   arch/arm/dts/socfpga_cyclone5_ac501soc.dts    |  85 +++
>   .../dts/socfpga_cyclone_ac501soc-u-boot.dtsi  |  44 ++
>   arch/arm/mach-socfpga/Kconfig                 |   7 +
>   board/corecourse/ac501soc/MAINTAINERS         |   6 +
>   board/corecourse/ac501soc/qts/iocsr_config.h  | 664 ++++++++++++++++++
>   board/corecourse/ac501soc/qts/pinmux_config.h | 222 ++++++
>   board/corecourse/ac501soc/qts/pll_config.h    |  86 +++
>   board/corecourse/ac501soc/qts/sdram_config.h  | 349 +++++++++
>   configs/socfpga_ac501soc_defconfig            |  85 +++
>   include/configs/socfpga_ac501soc.h            |  13 +
>   11 files changed, 1562 insertions(+)
>   create mode 100644 arch/arm/dts/socfpga_cyclone5_ac501soc.dts
>   create mode 100644 arch/arm/dts/socfpga_cyclone_ac501soc-u-boot.dtsi
>   create mode 100644 board/corecourse/ac501soc/MAINTAINERS
>   create mode 100644 board/corecourse/ac501soc/qts/iocsr_config.h
>   create mode 100644 board/corecourse/ac501soc/qts/pinmux_config.h
>   create mode 100644 board/corecourse/ac501soc/qts/pll_config.h
>   create mode 100644 board/corecourse/ac501soc/qts/sdram_config.h
>   create mode 100644 configs/socfpga_ac501soc_defconfig
>   create mode 100644 include/configs/socfpga_ac501soc.h
>
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index 3cd762977cb..2210b44f9bf 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -469,6 +469,7 @@ dtb-$(CONFIG_ARCH_SOCFPGA) +=                               \
>          socfpga_cyclone5_socrates.dtb                   \
>          socfpga_cyclone5_sr1500.dtb                     \
>          socfpga_cyclone5_vining_fpga.dtb                \
> +       socfpga_cyclone5_ac501soc.dtb                   \
>          socfpga_n5x_socdk.dtb                           \
>          socfpga_stratix10_socdk.dtb
>
> diff --git a/arch/arm/dts/socfpga_cyclone5_ac501soc.dts b/arch/arm/dts/socfpga_cyclone5_ac501soc.dts
> new file mode 100644
> index 00000000000..0b32a574086
> --- /dev/null
> +++ b/arch/arm/dts/socfpga_cyclone5_ac501soc.dts
> @@ -0,0 +1,85 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (C) 2025, Brian Sune
> + *
> + * based on socfpga_cyclone5_socdk.dts
> + */
> +
> +#include "socfpga_cyclone5.dtsi"
> +
> +/ {
> +       model = "CoreCourse AC501SoC";
> +       compatible = "altr,socfpga-cyclone5", "altr,socfpga";
> +
> +       chosen {
> +               bootargs = "console=ttyS0,115200";
> +               stdout-path = "serial0:115200n8";
> +       };
> +
> +       aliases {
> +               ethernet0 = &gmac1;
> +               udc0 = &usb1;
> +       };
> +
> +       memory {
> +               name = "memory";
> +               device_type = "memory";
> +               reg = <0x0 0x40000000>; /* 1GB */
> +       };
> +};
> +
> +&gmac1 {
> +       status = "okay";
> +       phy-mode = "rgmii";
> +
> +       rxd0-skew-ps = <420>;
> +       rxd1-skew-ps = <420>;
> +       rxd2-skew-ps = <420>;
> +       rxd3-skew-ps = <420>;
> +       txen-skew-ps = <0>;
> +       txc-skew-ps = <1860>;
> +       rxdv-skew-ps = <420>;
> +       rxc-skew-ps = <1680>;
> +};
> +
> +&gpio0 {
> +       status = "okay";
> +};
> +
> +&gpio1 {
> +       status = "okay";
> +};
> +
> +&gpio2 {
> +       status = "okay";
> +};
> +
> +&porta {
> +       bank-name = "porta";
> +};
> +
> +&portb {
> +       bank-name = "portb";
> +};
> +
> +&portc {
> +       bank-name = "portc";
> +};
> +
> +&mmc0 {
> +       status = "okay";
> +       bootph-all;
> +};
> +
> +&usb1 {
> +       status = "okay";
> +};
> +
> +&uart0 {
> +       clock-frequency = <100000000>;
> +       bootph-all;
> +};
> +
> +&watchdog0 {
> +       status = "disabled";
> +};

Avoid duplicating nodes between the board DTS and the -u-boot.dtsi 
(e.g., porta/portb/portc, watchdog0, uart0).

Keep board-common settings (usable by Linux and U-Boot) in the DTS; 
U-Boot–specific bits belong in socfpga_cyclone_ac501soc-u-boot.dtsi.

bootph-all; is U-Boot-only and should be in the -u-boot.dtsi, not in the 
DTS.


Thanks.


Best regards,

Tien Fong