[PATCH v5 0/2] Enable dynamic MMU page table sizing
Pranav Sanwal
pranav.sanwal at amd.com
Thu Jan 29 13:00:19 CET 2026
This patch series fixes a boot sequence issue in AMD Versal Gen 2, where DRAM banks are populated too late during MMU initialization.
The fdtdec-based approach doesn't provide memory information early enough.
Changes in v5:
-Add fdtdec_ prefix to exported fdt api.
-Clean up DDR init logs.
Changes in v4:
-Better debug logs alignment.
Changes in v3:
-Fix DRAM base detection boundary condition (text >= bank_phys)
Changes in v2:
-Address boundary case where U-Boot is loaded at the beginning of a memory region.
-Export get_next_memory_node() helper from fdtdec for reuse -Split previous monolithic patch into two focused patches -Add comprehensive documentation for new functions -Include proper header dependencies (dm/ofnode_decl.h)
Pranav Sanwal (2):
fdtdec: Add declaration for get_next_memory_node() helper
arm64: versal2: Populate DRAM banks before page table size calculation
arch/arm/mach-versal2/cpu.c | 55 ++++++++++++--
.../arm/mach-versal2/include/mach/sys_proto.h | 4 +-
board/amd/versal2/board.c | 75 +++++++++++++++----
include/fdtdec.h | 24 ++++++
lib/fdtdec.c | 7 +-
5 files changed, 140 insertions(+), 25 deletions(-)
--
2.34.1
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