[PATCH v1 1/3] net: fsl_enetc: xpcs_phy: access PMA/PCS via MDIO_MMD_VEND2 on i.MX952

alice.guo at oss.nxp.com alice.guo at oss.nxp.com
Tue Jul 7 06:00:25 CEST 2026


From: Alice Guo <alice.guo at nxp.com>

On i.MX95 the PMA and PCS registers are reached through the
MDIO_MMD_PMAPMD and MDIO_MMD_PCS. On i.MX952, the same registers are
only accessible through the MDIO_MMD_VEND2.

Add a per-device "without_pcs_pma" flag to struct enetc_priv and use it
to select MDIO_MMD_VEND2 instead of MDIO_MMD_PMAPMD/MDIO_MMD_PCS. The
flag is set on the i.MX952 SGMII configuration path, so all other
platforms keep the previous behaviour.

Signed-off-by: Alice Guo <alice.guo at nxp.com>
---
 drivers/net/fsl_enetc.h          |  1 +
 drivers/net/fsl_enetc_xpcs_phy.c | 16 ++++++++++++----
 2 files changed, 13 insertions(+), 4 deletions(-)

diff --git a/drivers/net/fsl_enetc.h b/drivers/net/fsl_enetc.h
index bcab6f252a0..aab69d0168e 100644
--- a/drivers/net/fsl_enetc.h
+++ b/drivers/net/fsl_enetc.h
@@ -193,6 +193,7 @@ struct enetc_priv {
 	int uclass_id;
 	struct mii_dev imdio;
 	struct phy_device *phy;
+	bool without_pcs_pma;
 };
 
 struct enetc_data {
diff --git a/drivers/net/fsl_enetc_xpcs_phy.c b/drivers/net/fsl_enetc_xpcs_phy.c
index 6414324e7d2..a8c720786a0 100644
--- a/drivers/net/fsl_enetc_xpcs_phy.c
+++ b/drivers/net/fsl_enetc_xpcs_phy.c
@@ -258,12 +258,18 @@ int xpcs_phy_write(struct udevice *dev, int devaddr, u32 reg, u16 val)
 
 int xpcs_phy_read_pma(struct udevice *dev, u32 reg)
 {
-	return xpcs_read(dev, MDIO_MMD_PMAPMD, XPCS_PHY_REG(reg));
+	struct enetc_priv *priv = dev_get_priv(dev);
+	int mdio_mmd = priv->without_pcs_pma ? MDIO_MMD_VEND2 : MDIO_MMD_PMAPMD;
+
+	return xpcs_read(dev, mdio_mmd, XPCS_PHY_REG(reg));
 }
 
 int xpcs_phy_write_pma(struct udevice *dev, int reg, u16 val)
 {
-	return xpcs_write(dev, MDIO_MMD_PMAPMD, XPCS_PHY_REG(reg), val);
+	struct enetc_priv *priv = dev_get_priv(dev);
+	int mdio_mmd = priv->without_pcs_pma ? MDIO_MMD_VEND2 : MDIO_MMD_PMAPMD;
+
+	return xpcs_write(dev, mdio_mmd, XPCS_PHY_REG(reg), val);
 }
 
 static int xpcs_phy_common_init_seq_1(struct udevice *dev)
@@ -1270,6 +1276,8 @@ static int xpcs_phy_common_init_seq_2(struct udevice *dev, bool an)
 {
 	ulong begin;
 	u16 val;
+	struct enetc_priv *priv = dev_get_priv(dev);
+	int mdio_mmd = priv->without_pcs_pma ? MDIO_MMD_VEND2 : MDIO_MMD_PCS;
 
 	val = xpcs_read(dev, MDIO_MMD_VEND2, XPCS_PHY_REG(MII_CTRL));
 	if (an)
@@ -1278,9 +1286,9 @@ static int xpcs_phy_common_init_seq_2(struct udevice *dev, bool an)
 		val &= ~MII_CTRL_AN_ENABLE;
 	xpcs_write(dev, MDIO_MMD_VEND2, XPCS_PHY_REG(MII_CTRL), val);
 
-	val = xpcs_read(dev, MDIO_MMD_PCS, XPCS_PHY_REG(PCS_DEBUG_CTRL));
+	val = xpcs_read(dev, mdio_mmd, XPCS_PHY_REG(PCS_DEBUG_CTRL));
 	val |= PCS_DEBUG_CTRL_TX_PMBL_CTL;
-	xpcs_write(dev, MDIO_MMD_PCS, XPCS_PHY_REG(PCS_DEBUG_CTRL), val);
+	xpcs_write(dev, mdio_mmd, XPCS_PHY_REG(PCS_DEBUG_CTRL), val);
 
 	val = xpcs_phy_read_pma(dev, PMA_MP_12G_16G_25G_TX_POWER_STATE_CTRL);
 	val = u16_replace_bits(val, 2, PMA_POWER_STATE_CTRL_TX0_PSTATE_MASK);

-- 
2.34.1



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