[PATCH 10/15] ddr: altera: n5x: use correct cast for reset status register read

[Chen Huei Lok]

From: Tien Fong Chee <tien.fong.chee at altera.com>

Klocwork reported a potential value overflow from an incorrect typecast.
It cannot actually happen here because the result never exceeds 32 bits,
but correct the casting of the reset-status register read for the sake of
good coding practice.

Signed-off-by: Tien Fong Chee <tien.fong.chee at altera.com>
Signed-off-by: Chen Huei Lok <chen.huei.lok at altera.com>
---
 drivers/ddr/altera/sdram_n5x.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/ddr/altera/sdram_n5x.c b/drivers/ddr/altera/sdram_n5x.c
index c101123b14b..0bb04c5eac6 100644
--- a/drivers/ddr/altera/sdram_n5x.c
+++ b/drivers/ddr/altera/sdram_n5x.c
@@ -2864,9 +2864,9 @@ int sdram_mmr_init_full(struct udevice *dev)
 		 * subsystem in complete reset state before init DDR clock
 		 * and DDR controller
 		 */
-		ret = wait_for_bit_le32((const void *)((uintptr_t)(readl
+		ret = wait_for_bit_le32((const void *)((uintptr_t)readl
 					(ddr_handoff_info.mem_reset_base) +
-					MEM_RST_MGR_STATUS)),
+					MEM_RST_MGR_STATUS),
 					MEM_RST_MGR_STATUS_RESET_COMPLETE,
 					true, TIMEOUT_200MS, false);
 		if (ret) {
@@ -2889,8 +2889,8 @@ int sdram_mmr_init_full(struct udevice *dev)
 
 		/* Release the controller from reset */
 		setbits_le32((uintptr_t)
-			     (readl(ddr_handoff_info.mem_reset_base) +
-			     MEM_RST_MGR_STATUS), MEM_RST_MGR_STATUS_AXI_RST |
+			     readl(ddr_handoff_info.mem_reset_base) +
+			     MEM_RST_MGR_STATUS, MEM_RST_MGR_STATUS_AXI_RST |
 			     MEM_RST_MGR_STATUS_CONTROLLER_RST |
 			     MEM_RST_MGR_STATUS_RESET_COMPLETE);
 
-- 
2.43.7