[PATCH 12/15] ddr: altera: n5x: rename is_ddr_init_skipped() and quieten reset log

[Chen Huei Lok]

Rename is_ddr_init_skipped() to is_ddr_init() and invert its return value
so the helper reads naturally at the call site (true means DDR must be
initialised). The decision is otherwise unchanged: init is required on
POR, skipped on a warm reset, and skipped on a cold reset only when the
retention bit is set.

Switch the reset-type reporting from printf() to debug() so the reset
cause is not printed on every boot, and add the NCONFIG, JTAG_CONFIG and
RSU_RECONFIG cases. Define reset_type_debug_print() above its first caller
so the new call site does not trigger an implicit-declaration warning.

Signed-off-by: Chen Huei Lok <chen.huei.lok at altera.com>
---
 drivers/ddr/altera/sdram_n5x.c | 56 +++++++++++++---------------------
 1 file changed, 22 insertions(+), 34 deletions(-)

diff --git a/drivers/ddr/altera/sdram_n5x.c b/drivers/ddr/altera/sdram_n5x.c
index 6fed9b79257..d7f00b6d2f5 100644
--- a/drivers/ddr/altera/sdram_n5x.c
+++ b/drivers/ddr/altera/sdram_n5x.c
@@ -469,17 +469,17 @@ static enum reset_type get_reset_type(u32 reg)
 		ALT_SYSMGR_SCRATCH_REG_0_DDR_RESET_TYPE_SHIFT;
 }
 
-void reset_type_print(enum reset_type reset_t)
+void reset_type_debug_print(u32 boot_scratch_cold0_reg)
 {
-	switch (reset_t) {
+	switch (get_reset_type(boot_scratch_cold0_reg)) {
 	case POR_RESET:
-		printf("%s: POR is triggered\n", __func__);
+		debug("%s: POR is triggered\n", __func__);
 		break;
 	case WARM_RESET:
-		printf("%s: Warm reset is triggered\n", __func__);
+		debug("%s: Warm reset is triggered\n", __func__);
 		break;
 	case COLD_RESET:
-		printf("%s: Cold reset is triggered\n", __func__);
+		debug("%s: Cold reset is triggered\n", __func__);
 		break;
 	case NCONFIG:
 		printf("%s: NCONFIG is triggered\n", __func__);
@@ -491,34 +491,39 @@ void reset_type_print(enum reset_type reset_t)
 		printf("%s: RSU_RECONFIG is triggered\n", __func__);
 		break;
 	default:
-		printf("%s: Invalid reset type\n", __func__);
+		debug("%s: Invalid reset type\n", __func__);
 	}
 }
 
-bool is_ddr_init_skipped(u32 reg, bool is_ddr_hang_be4_rst)
+bool is_ddr_init(bool is_ddr_hang_be4_rst)
 {
-	enum reset_type reset_t = get_reset_type(reg);
+	u32 reg = readl(socfpga_get_sysmgr_addr() +
+			SYSMGR_SOC64_BOOT_SCRATCH_COLD0);
 
-	reset_type_print(reset_t);
+	reset_type_debug_print(reg);
 
 	if (!is_ddr_dbe_triggered() && !is_ddr_hang_be4_rst) {
-		if (reset_t == WARM_RESET) {
-			debug("%s: DDR init is skipped\n", __func__);
+		if (get_reset_type(reg) == POR_RESET) {
+			debug("%s: DDR init is required\n", __func__);
 			return true;
 		}
 
-		if (reset_t == COLD_RESET) {
+		if (get_reset_type(reg) == WARM_RESET) {
+			debug("%s: DDR init is skipped\n", __func__);
+			return false;
+		}
+
+		if (get_reset_type(reg) == COLD_RESET) {
 			if (is_ddr_retention_enabled(reg)) {
-				debug("%s: DDR retention bit is set\n",
-				      __func__);
+				debug("%s: DDR retention bit is set\n", __func__);
 				debug("%s: DDR init is skipped\n", __func__);
-				return true;
+				return false;
 			}
 		}
 	}
 
 	debug("%s: DDR init is required\n", __func__);
-	return false;
+	return true;
 }
 
 bool is_ddr_calibration_skipped(u32 reg, bool is_ddr_hang_be4_rst)
@@ -2806,23 +2811,6 @@ static int ddr_post_config(struct ddr_handoff *handoff, bool *need_calibrate)
 	return ret;
 }
 
-void reset_type_debug_print(u32 boot_scratch_cold0_reg)
-{
-	switch (get_reset_type(boot_scratch_cold0_reg)) {
-	case POR_RESET:
-		debug("%s: POR is triggered\n", __func__);
-		break;
-	case WARM_RESET:
-		debug("%s: Warm reset is triggered\n", __func__);
-		break;
-	case COLD_RESET:
-		debug("%s: Cold reset is triggered\n", __func__);
-		break;
-	default:
-		debug("%s: Invalid reset type\n", __func__);
-	}
-}
-
 int sdram_mmr_init_full(struct udevice *dev)
 {
 	u32 user_backup[2], user_backup_2nd[2];
@@ -2855,7 +2843,7 @@ int sdram_mmr_init_full(struct udevice *dev)
 	 */
 	writel(SOC64_CRAM_PHY_BACKUP_SKIP_MAGIC, SOC64_OCRAM_PHY_BACKUP_BASE);
 
-	if (!is_ddr_init_skipped(reg, is_ddr_hang_be4_rst)) {
+	if (is_ddr_init(is_ddr_hang_be4_rst)) {
 		printf("SDRAM init in progress ...\n");
 		ddr_init_inprogress(true);
 
-- 
2.43.7