[PATCH 1/6] clk: rockchip: pll: drop misleading fout in rockchip_rk3588_pll_k_get()
Alexey Charkov
alchark at flipper.net
Mon Jul 13 20:35:17 CEST 2026
The calculation in rockchip_rk3588_pll_k_get() uses an intermediate
variable misleadingly named fout, which is not the output frequency.
Drop it and inline its calculation into the k assignment, which also
improves clarity. While at that, also drop the redundant reassignment of
fref which doesn't change within this function.
Signed-off-by: Alexey Charkov <alchark at flipper.net>
---
drivers/clk/rockchip/clk_pll.c | 9 +++------
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/drivers/clk/rockchip/clk_pll.c b/drivers/clk/rockchip/clk_pll.c
index 9dec40b1fe83..d0df3b8fb49d 100644
--- a/drivers/clk/rockchip/clk_pll.c
+++ b/drivers/clk/rockchip/clk_pll.c
@@ -169,18 +169,15 @@ rockchip_pll_clk_set_by_auto(ulong fin_hz,
static u32
rockchip_rk3588_pll_k_get(u32 m, u32 p, u32 s, u64 fin_hz, u64 fvco)
{
- u64 fref, fout, ffrac;
+ u64 fref, ffrac;
u32 k = 0;
fref = fin_hz / p;
ffrac = fvco - (m * fref);
- fout = ffrac * 65536;
- k = fout / fref;
+ k = ffrac * 65536 / fref;
if (k > 32767) {
- fref = fin_hz / p;
ffrac = ((m + 1) * fref) - fvco;
- fout = ffrac * 65536;
- k = ((fout * 10 / fref) + 7) / 10;
+ k = ((ffrac * 65536 * 10 / fref) + 7) / 10;
if (k > 32767)
k = 0;
else
--
2.53.0
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