[PATCH v2 1/2] riscv: Make RISCV_ACLINT visible
Michal Simek
michal.simek at amd.com
Mon May 4 11:26:28 CEST 2026
A platform (like Xilinx Microblaze V) does not have an ACLINT (Advanced
Core Local Interruptor) hardware block.
Make RISCV_ACLINT and SPL_RISCV_ACLINT Kconfig symbols visible with
prompts and enable them by default
Signed-off-by: Michal Simek <michal.simek at amd.com>
---
Changes in v2:
- Make symbols visible and disable them per platform basis
arch/riscv/Kconfig | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index ad7589123c6c..d14086e9f4dc 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -378,8 +378,9 @@ config DMA_ADDR_T_64BIT
default y if 64BIT
config RISCV_ACLINT
- bool
+ bool "RISC-V ACLINT support"
depends on RISCV_MMODE
+ default y
select REGMAP
select SYSCON
help
@@ -387,8 +388,9 @@ config RISCV_ACLINT
associated with software and timer interrupts.
config SPL_RISCV_ACLINT
- bool
+ bool "RISC-V ACLINT support in SPL"
depends on SPL_RISCV_MMODE
+ default y
select SPL_REGMAP
select SPL_SYSCON
help
--
2.43.0
base-commit: bb0f3eebb3c196d9b6efbbd1e5aa9b16abbb9ad6
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