[PATCH] arm: apple: Add Apple M3 (t8122) support

Janne Grunau j at jannau.net
Thu May 7 10:35:18 CEST 2026


Hej,

On Sat, May 02, 2026 at 01:53:43PM +0200, Mark Kettenis wrote:
> > From: Janne Grunau <j at jannau.net>
> > Date: Fri, 01 May 2026 16:07:16 +0200
> 
> > Apple's M3 SoC is similar to M1 and M2 but uses a different memory map.
> > The main difference is that RAM starts at 0x100_0000_0000 like on t600x
> > and t602x (M1 and M2 Pro/Max/Ultra). Otherwise IO blocks have been
> > rearranged.
> > U-boot's existing drivers are compatible with the hardware and M3 device
> > trees will carry "apple,t8103-*" compatible strings. Only
> > apple-atcphy-reset might need a new compatible due to USB4 / DisplayPort
> > changes the Linux driver has to deal with.
> > 
> > Signed-off-by: Janne Grunau <j at jannau.net>
> > ---
> >  arch/arm/mach-apple/board.c | 71 +++++++++++++++++++++++++++++++++++++++++++++
> >  1 file changed, 71 insertions(+)
> > 
> > diff --git a/arch/arm/mach-apple/board.c b/arch/arm/mach-apple/board.c
> > index 4cd8979bdc2..914b4581e7d 100644
> > --- a/arch/arm/mach-apple/board.c
> > +++ b/arch/arm/mach-apple/board.c
> > @@ -85,6 +85,75 @@ static struct mm_region t8103_mem_map[] = {
> >  	}
> >  };
> >  
> > +/* Apple M3 */
> 
> I think it makes more sense to keep things sorted based on the name
> and put M3 after M2 Ultra?  M2 is the odd one out here since it is
> identical to M1.

ack, I still think of t81xx and t60xx as two separate groups and group
them together but I think that's not maintainable in the long run.
This doesn't seem to hold for t6030 (M3 Pro) which looks more like an
extended M3 or M4 than a chopped down t6031 (M3 Max).

> > +
> > +static struct mm_region t8122_mem_map[] = {
> > +	{
> > +		/* I/O */
> > +		.virt = 0x210000000,
> > +		.phys = 0x210000000,
> > +		.size = 4UL * SZ_1G,
> 
> We should try to keep the regions aligned on 1G boundaries with sizes
> that are multiples of 1G as that allows for more efficient page
> tables.
> 
> I haven't looked at Apple's device tree for the t8122 (I don't think I
> have ever seen one).  But based on the t8122.dtsi from the asahi-wip
> branch, I'd suggest using two regions
> 
> 0x200000000: 4UL * SZ_1G
> 0x300000000: 1UL * SZ_1G
> 
> You could tag the region at 0x300000000 as /* NVME */ if the Apple dts
> doesn't suggest there are non-NVMe things in there.

Apple's device tree for the M3 Macbook Pro (J504) has only NVMe related
nodes in 0x300000000... (ignoring pmgr's and error-handler's views into
other devices). I'll split the regions and annotate the second one as
NVMe.

> > +		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
> > +			 PTE_BLOCK_NON_SHARE |
> > +			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
> > +	}, {
> > +		/* I/O */
> > +		.virt = 0x700000000,
> > +		.phys = 0x700000000,
> > +		.size = SZ_1G,
> > +		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
> > +			 PTE_BLOCK_NON_SHARE |
> > +			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
> > +	}, {
> > +		/* I/O */
> > +		.virt = 0xb00000000,
> > +		.phys = 0xb00000000,
> > +		.size = SZ_1G,
> > +		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
> > +			 PTE_BLOCK_NON_SHARE |
> > +			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
> > +	}, {
> > +		/* I/O */
> > +		.virt = 0x580000000,
> > +		.phys = 0x580000000,
> > +		.size = SZ_512M,
> > +		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
> > +			 PTE_BLOCK_NON_SHARE |
> > +			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
> > +	}, {
> > +		/* PCIE */
> > +		.virt = 0x5a0000000,
> > +		.phys = 0x5a0000000,
> > +		.size = SZ_512M,
> > +		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRE) |
> > +			 PTE_BLOCK_INNER_SHARE |
> > +			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
> > +	}, {
> > +		/* PCIE */
> > +		.virt = 0x5c0000000,
> > +		.phys = 0x5c0000000,
> > +		.size = SZ_1G,
> > +		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRE) |
> > +			 PTE_BLOCK_INNER_SHARE |
> > +			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
> > +	}, {
> > +		/* RAM */
> > +		.virt = 0x10000000000,
> > +		.phys = 0x10000000000,
> > +		.size = 8UL * SZ_1G,
> > +		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
> > +			 PTE_BLOCK_INNER_SHARE
> > +	}, {
> > +		/* Framebuffer */
> > +		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL_NC) |
> > +			 PTE_BLOCK_INNER_SHARE |
> > +			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
> > +	}, {
> > +		/* List terminator */
> > +		0,
> > +	}
> > +};
> > +
> >  /* Apple M1 Pro/Max */
> >  
> >  static struct mm_region t6000_mem_map[] = {
> > @@ -710,6 +779,8 @@ void build_mem_map(void)
> >  	if (of_machine_is_compatible("apple,t8103") ||
> >  	    of_machine_is_compatible("apple,t8112"))
> >  		mem_map = t8103_mem_map;
> > +	else if (of_machine_is_compatible("apple,t8122"))
> > +		mem_map = t8122_mem_map;
> 
> I'd probably move this down as well.

ack

I'll send a v2 shortly, thanks

Janne


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