[PATCH v2] arm: apple: Add Apple M3 (t8122) support

[Mark Kettenis]

> From: Janne Grunau <j at jannau.net>
> Date: Thu, 07 May 2026 10:41:40 +0200
> 
> Apple's M3 SoC is similar to M1 and M2 but uses a different memory map.
> The main difference is that RAM starts at 0x100_0000_0000 like on t600x
> and t602x (M1 and M2 Pro/Max/Ultra). Otherwise IO blocks have been
> rearranged.
> U-boot's existing drivers are compatible with the hardware and M3 device
> trees will carry "apple,t8103-*" compatible strings. Only
> apple-atcphy-reset might need a new compatible due to USB4 / DisplayPort
> changes the Linux driver has to deal with.
> 
> Signed-off-by: Janne Grunau <j at jannau.net>

Acked-by: Mark Kettenis <kettenis at openbsd.org>

> ---
> Changes in v2:
> - aligned main MMIO region to SZ_1G
> - split of NVMe region at 0x300000000
> - sorted IO regions by address
> - reordered M3 additions chronologically with other SoCs
> - Link to v1: https://patch.msgid.link/20260501-apple-m3-support-v1-1-4165bc2a73f4@jannau.net
> ---
>  arch/arm/mach-apple/board.c | 79 +++++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 79 insertions(+)
> 
> diff --git a/arch/arm/mach-apple/board.c b/arch/arm/mach-apple/board.c
> index 4cd8979bdc2..20054f54089 100644
> --- a/arch/arm/mach-apple/board.c
> +++ b/arch/arm/mach-apple/board.c
> @@ -673,6 +673,83 @@ static struct mm_region t6022_mem_map[] = {
>  	}
>  };
>  
> +/* Apple M3 */
> +
> +static struct mm_region t8122_mem_map[] = {
> +	{
> +		/* I/O */
> +		.virt = 0x200000000,
> +		.phys = 0x200000000,
> +		.size = 4UL * SZ_1G,
> +		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
> +			 PTE_BLOCK_NON_SHARE |
> +			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
> +	}, {
> +		/* NVMe */
> +		.virt = 0x300000000,
> +		.phys = 0x300000000,
> +		.size = SZ_1G,
> +		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
> +			 PTE_BLOCK_NON_SHARE |
> +			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
> +	}, {
> +		/* PCIE */
> +		.virt = 0x580000000,
> +		.phys = 0x580000000,
> +		.size = SZ_512M,
> +		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
> +			 PTE_BLOCK_NON_SHARE |
> +			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
> +	}, {
> +		/* PCIE */
> +		.virt = 0x5a0000000,
> +		.phys = 0x5a0000000,
> +		.size = SZ_512M,
> +		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRE) |
> +			 PTE_BLOCK_INNER_SHARE |
> +			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
> +	}, {
> +		/* PCIE */
> +		.virt = 0x5c0000000,
> +		.phys = 0x5c0000000,
> +		.size = SZ_1G,
> +		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRE) |
> +			 PTE_BLOCK_INNER_SHARE |
> +			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
> +	}, {
> +		/* I/O ATC0 */
> +		.virt = 0x700000000,
> +		.phys = 0x700000000,
> +		.size = SZ_1G,
> +		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
> +			 PTE_BLOCK_NON_SHARE |
> +			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
> +	}, {
> +		/* I/O ATC1 */
> +		.virt = 0xb00000000,
> +		.phys = 0xb00000000,
> +		.size = SZ_1G,
> +		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
> +			 PTE_BLOCK_NON_SHARE |
> +			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
> +	}, {
> +		/* RAM */
> +		.virt = 0x10000000000,
> +		.phys = 0x10000000000,
> +		.size = 8UL * SZ_1G,
> +		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
> +			 PTE_BLOCK_INNER_SHARE
> +	}, {
> +		/* Framebuffer */
> +		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL_NC) |
> +			 PTE_BLOCK_INNER_SHARE |
> +			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
> +	}, {
> +		/* List terminator */
> +		0,
> +	}
> +};
> +
>  struct mm_region *mem_map;
>  
>  int board_init(void)
> @@ -720,6 +797,8 @@ void build_mem_map(void)
>  		mem_map = t6020_mem_map;
>  	else if (of_machine_is_compatible("apple,t6022"))
>  		mem_map = t6022_mem_map;
> +	else if (of_machine_is_compatible("apple,t8122"))
> +		mem_map = t8122_mem_map;
>  	else
>  		panic("Unsupported SoC\n");
>  
> 
> ---
> base-commit: 4433253ecf2041f9362a763bb6cb79960921ac7e
> change-id: 20260501-apple-m3-support-9fc25ab793d4
> 
> Best regards,
> -- 
> Janne Grunau <j at jannau.net>
> 
>