[PATCH 1/7] arm64: xilinx: Add PMC PGGS3 and PGGS4 registers

[Padmarao Begari]

Add PMC Global PGGS3 and PGGS4 register defines to Versal and
Versal Gen 2 hardware headers. These registers hold boot index
and boot metadata required for FWU multi-bank update support.

Signed-off-by: Padmarao Begari <padmarao.begari at amd.com>
---
 arch/arm/mach-versal/include/mach/hardware.h  | 3 +++
 arch/arm/mach-versal2/include/mach/hardware.h | 3 +++
 2 files changed, 6 insertions(+)

diff --git a/arch/arm/mach-versal/include/mach/hardware.h b/arch/arm/mach-versal/include/mach/hardware.h
index b5f80a8e3a9..66eca18998a 100644
--- a/arch/arm/mach-versal/include/mach/hardware.h
+++ b/arch/arm/mach-versal/include/mach/hardware.h
@@ -100,3 +100,6 @@ struct crp_regs {
 #define MIO_PIN_12	0xF1060030
 #define BANK0_OUTPUT	0xF1020040
 #define BANK0_TRI	0xF1060200
+
+#define PMC_GLOBAL_PGGS3_REG	0xF111005C
+#define PMC_GLOBAL_PGGS4_REG	0xF1110060
diff --git a/arch/arm/mach-versal2/include/mach/hardware.h b/arch/arm/mach-versal2/include/mach/hardware.h
index 81a0df89357..1bebf20910a 100644
--- a/arch/arm/mach-versal2/include/mach/hardware.h
+++ b/arch/arm/mach-versal2/include/mach/hardware.h
@@ -105,3 +105,6 @@ enum versal2_platform {
 #define PMXC_UFS_CAL_1_OFFSET		0xBE8
 #define PMXC_SRAM_CSR			0x4C
 #define PMXC_TX_RX_CFG_RDY		0x54
+
+#define PMC_GLOBAL_PGGS3_REG	0xF111005C
+#define PMC_GLOBAL_PGGS4_REG	0xF1110060
-- 
2.34.1