[PATCH v2 1/2] riscv: Make RISCV_ACLINT visible

[Michal Simek]

On 5/4/26 11:26, Michal Simek wrote:
> A platform (like Xilinx Microblaze V) does not have an ACLINT (Advanced
> Core Local Interruptor) hardware block.
> 
> Make RISCV_ACLINT and SPL_RISCV_ACLINT Kconfig symbols visible with
> prompts and enable them by default
> 
> Signed-off-by: Michal Simek <michal.simek at amd.com>
> ---
> 
> Changes in v2:
> - Make symbols visible and disable them per platform basis
> 
>   arch/riscv/Kconfig | 6 ++++--
>   1 file changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index ad7589123c6c..d14086e9f4dc 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -378,8 +378,9 @@ config DMA_ADDR_T_64BIT
>   	default y if 64BIT
>   
>   config RISCV_ACLINT
> -	bool
> +	bool "RISC-V ACLINT support"
>   	depends on RISCV_MMODE
> +	default y

This is breaking ae350_rv64_defconfig targets and likely others.
Default shouldn't be setup.

Anyway I will send v3 when CI ends.

Thanks,
Michal