[PATCH RFC 14/18] rockchip: rk356x: Add DMC related syscons to u-boot.dtsi

[Pavel Golikov]

Add ddrgrf, sgrf and msch syscons in u-boot.dtsi. Those are needed for
RK3568's DRAM controller initialization. Reference them in DMC node.
DRAM controller also needs CRU, so, add reference to it too.

Signed-off-by: Pavel Golikov <paullo612 at ya.ru>
---
 arch/arm/dts/rk356x-u-boot.dtsi | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

diff --git a/arch/arm/dts/rk356x-u-boot.dtsi b/arch/arm/dts/rk356x-u-boot.dtsi
index b9f300a3274..3202c1bf534 100644
--- a/arch/arm/dts/rk356x-u-boot.dtsi
+++ b/arch/arm/dts/rk356x-u-boot.dtsi
@@ -16,8 +16,33 @@
 		u-boot,spl-boot-order = "same-as-spl", &sdmmc0, &sdhci;
 	};
 
+	ddrgrf: syscon at fdc40000 {
+		compatible = "rockchip,rk3568-ddrgrf", "syscon";
+		reg = <0x0 0xfdc40000 0x0 0x10000>;
+
+		bootph-all;
+	};
+
+	sgrf: syscon at fdd18000 {
+		compatible = "rockchip,rk3568-sgrf", "syscon";
+		reg = <0x0 0xfdd18000 0x0 0x4000>;
+
+		bootph-all;
+	};
+
+	msch: syscon at fe100000 {
+		compatible = "rockchip,rk3568-msch", "syscon";
+		reg = <0x0 0xfe100000 0x0 0x2000>;
+
+		bootph-all;
+	};
+
 	dmc: dmc at fe250000 {
 		compatible = "rockchip,rk3568-dmc";
+		rockchip,ddrgrf = <&ddrgrf>;
+		rockchip,cru = <&cru>;
+		rockchip,msch = <&msch>;
+		rockchip,pmugrf = <&pmugrf>;
 		reg = <0 0xfe250000 0 0x10000
 		       0 0xfe800000 0 0x10000>;
 

-- 
2.25.1