[PATCH master v2 0/2] Fix speculative access to firewalled regions on AM62 SoCs
Anshul Dalal
anshuld at ti.com
Mon May 18 13:52:48 CEST 2026
Hi all,
This patch series fixes firewall exceptions observed on AM62 family of
devices due to speculative accesses made by the A53 core to secure DDR
regions.
For testing, I had used an AM62p with the following diff to enable
logging from TIFS:
--- a/board/ti/am62px/board-cfg.yaml
+++ b/board/ti/am62px/board-cfg.yaml
@@ -33,5 +33,5 @@ board-cfg:
subhdr:
magic: 0x020C
size: 8
- trace_dst_enables: 0x00
- trace_src_enables: 0x00
+ trace_dst_enables: 0xd
+ trace_src_enables: 0x3f
Without this patch an exception[1] similar to the following is observed
at A53 SPL stage:
FWL Bit 0x1
Exception addr 0x45B08000
FWL Exception 0x1000100
0x60000
0x80002880
0x0
0x141201
0x40
[1]: https://software-dl.ti.com/tisci/esd/latest/6_topic_user_guides/firewall_faq.html#how-do-i-debug-firewall-issues
Signed-off-by: Anshul Dalal <anshuld at ti.com>
---
Changes in v2:
- Added Reported-by from Suhaas
- Modify ARMv8's mmu_setup instead of overriding it only for mach-k3
- Add mmu_enable to give boards more control over MMU configruation
- Link to v1: https://patch.msgid.link/20260512-am62_firewall_exception_fix-v1-1-4b274718bdac@ti.com
---
Anshul Dalal (2):
arm: armv8: mmu: move mmu enablement out of mmu_setup
mach-k3: enable mmu after reserved memory is unmapped
arch/arm/cpu/armv8/cache_v8.c | 5 ++++-
arch/arm/include/asm/armv8/mmu.h | 5 +++++
arch/arm/mach-k3/common.c | 2 ++
3 files changed, 11 insertions(+), 1 deletion(-)
---
base-commit: 13c1e13cc7fb1fa07867f835ccf25913594c71ec
change-id: 20260512-am62_firewall_exception_fix-20a335cca769
Best regards,
--
Anshul Dalal <anshuld at ti.com>
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