[PATCH master v3 2/2] mach-k3: enable mmu after reserved memory is unmapped

Ilias Apalodimas ilias.apalodimas at linaro.org
Wed May 20 08:33:37 CEST 2026


On Wed, 20 May 2026 at 05:52, Anshul Dalal <anshuld at ti.com> wrote:
>
> Currently the sequence to enable caches for the A53/A72 core on K3
> devices looks as follows:
>
>  1. Map entire DDR banks
>  2. Setup page tables (done by mmu_setup)
>  3. Enable MMU
>  4. Unmap reserved-memory regions
>  5. Enable caches
>
> However there is a brief period of execution between #3 and #4 where the
> core can issue speculative accesses to the entire DDR space (including
> the reserved-memory regions) despite the caches being disabled.
>
> A firewall exception is triggered whenever such speculative access is
> made to secure DDR region of TFA or OP-TEE. This patch fixes the issue
> by re-ordering the sequence as follows:
>
>  1. Map entire DDR banks
>  2. Setup page tables
>  3. Unmap reserved-memory regions
>  4. Enable MMU
>  5. Enable caches
>
> Fixes: f1c694b8fdde ("mach-k3: map all banks using mem_map_from_dram_banks")
> Reported-by: Suhaas Joshi <s-joshi at ti.com>
> Signed-off-by: Anshul Dalal <anshuld at ti.com>
> ---

Reviewed-by: Ilias Apalodimas <ilias.apalodimas at linaro.org>

>  arch/arm/mach-k3/common.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c
> index 396018b7a7a..19a6e24f38b 100644
> --- a/arch/arm/mach-k3/common.c
> +++ b/arch/arm/mach-k3/common.c
> @@ -279,7 +279,6 @@ void enable_caches(void)
>                        __func__, fdt_strerror(ret));
>
>         mmu_setup();
> -       mmu_enable();
>
>         if (CONFIG_K3_ATF_LOAD_ADDR >= CFG_SYS_SDRAM_BASE) {
>                 ret = mmu_unmap_reserved_mem("tfa", true);
> @@ -295,6 +294,7 @@ void enable_caches(void)
>                                __func__, ret);
>         }
>
> +       mmu_enable();
>         icache_enable();
>         dcache_enable();
>  }
>
> --
> 2.53.0
>


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