[PATCH v1 1/1] video: bridge: tc358768: Add delay after PLL init

[Svyatoslav Ryhel]

After tc358768_setup_pll() enables PLL_CKEN and the lock indicator comes
up, the downstream DSI register sequence runs immediately. On TF700T this
results in the bridge claiming PLL lock but producing no DSI video output:
the panel powers up, the backlight comes on, but the framebuffer is never
scanned out.

Insert a small settling delay between PLL setup and the rest of the attach.

Suggested-by: Michele Brocco <brocco at perceptos.de>
Tested-by: Michele Brocco <brocco at perceptos.de> # TF700T
Signed-off-by: Svyatoslav Ryhel <clamor95 at gmail.com>
---
 drivers/video/bridge/tc358768.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/video/bridge/tc358768.c b/drivers/video/bridge/tc358768.c
index 358004f30f2..9fa9631fdcc 100644
--- a/drivers/video/bridge/tc358768.c
+++ b/drivers/video/bridge/tc358768.c
@@ -488,6 +488,9 @@ static int tc358768_attach(struct udevice *dev)
 
 	tc358768_setup_pll(dev);
 
+	/* Allow the PLL to settle */
+	mdelay(20);
+
 	dsiclk = priv->dsiclk;
 	hsbyteclk = dsiclk / 4;
 
-- 
2.51.0