[RFC PATCH v1 00/14] arm: rockchip: rk3576: BLOB-free TPL DRAM init

[Johan Axelsson]

This series adds an open-source TPL DRAM initialisation driver for the
Rockchip RK3576 SoC, replacing the proprietary DDR binary blob.

Hardware
--------
The RK3576 DDR subsystem consists of two independent channels, each
containing one Synopsys uMCTL2 DDRCTL and one Synopsys LPDDR4/4X/5
combo PHY.  Supported DRAM types: LPDDR4, LPDDR4X, LPDDR5.

The driver follows the TRM §7.6.2 (LPDDR4, 37 steps) and §7.6.3
(LPDDR5, 42 steps) software initialisation procedures.

PHY training
------------
The RK3576 combo PHY includes a hardware training engine controlled by
SCHD_TRAIN_CON0[0] (phy_train_en) and SCHD_TRAIN_CON0[1]
(phy_train_done).  No Synopsys PHY training firmware (.bin) is required.
This was confirmed from the TRM and matches the approach used on RK3568.

Timing tables
-------------
Precalculated timing tables are provided as .inc files, one per DRAM
type and speed grade.  The values in this RFC are TRM reset defaults
(placeholders) and are NOT correct for actual hardware operation.
Correct values require:
  - JEDEC JESD209-5B (LPDDR5) / JESD209-4D (LPDDR4) timing parameters
  - Synopsys uMCTL2 SRS field encoding rules
  - The specific DRAM part number and its datasheet

Target board
------------
Primary target: Flipper One (rk3576-flipper-one-rev-f0b0c1) with 8 GB
LPDDR5.  This addresses the open task in
flipperdevices/flipperone-linux-build-scripts#56.  The Flipper One DTS
is not yet upstream; a Flipper One defconfig will follow once it lands.

The series also enables the driver for the ArmSoM Sige5
(configs/sige5-rk3576_defconfig) as an immediately testable board.

Series structure
----------------
 01/14  sysreset: guard sysreset_psci.o from XPL builds (prerequisite)
 02/14  clk: rk3576: OF_PLATDATA support for TPL
 03/14  clk: rk3576: use CONFIG_XPL_BUILD (fixes TPL size exclusion)
 04/14  syscon: add DDR GRF region
 05/14  sdram_common: LPDDR4X and LPDDR5 type support
 06/14  new: sdram_pctl_rk3576.h — uMCTL2 register layout
 07/14  new: sdram_rk3576.h     — platform structs and addresses
 08/14  new: sdram_phy_rk3576.h — combo PHY register layout
 09/14  new: sdram_rk3576.c     — controller + PHY driver
 10/14  new: LPDDR4 timing table placeholder (1560 MHz CK)
 11/14  new: LPDDR5 timing table placeholder (2133 MHz PHY 2x clock)
 12/14  dts: DMC reg spaces and DDR GRF syscon node
 13/14  serial: DM_DRIVER_ALIAS for RK3576 UART
 14/14  Kconfig + defconfig: enable TPL for RK3576

Known limitations / TODO
-------------------------
 - Timing tables contain only TRM reset values.  Hardware bring-up
   will fail until values are calculated from JEDEC specs + chip data.
 - LPDDR5 MR1/MR2 encoding (initmr0) not yet calculated.
 - PHY vref and ODT settings use PHY reset defaults (steps 27-28/31-32).
 - Flipper One defconfig pending DTS upstream.
 - Not compile-tested on real hardware yet (cross-compiler required).

Modelled on the RK3568 RFC series (20260517-rk3568-raminit-v1,
Pavel Golikov).

Signed-off-by: Johan Axelsson <johan.axelsson at proton.me>

Johan Axelsson (14):
  sysreset: psci: exclude from XPL builds
  clk: rockchip: rk3576: add OF_PLATDATA support for TPL
  clk: rockchip: rk3576: use CONFIG_XPL_BUILD instead of
    CONFIG_SPL_BUILD
  arm: rockchip: rk3576: add DDR GRF syscon region
  ram: rockchip: sdram_common: add LPDDR4X and LPDDR5 support
  ram: rockchip: add RK3576 DDRCTL register definitions
  ram: rockchip: add RK3576 DRAM platform header
  ram: rockchip: add RK3576 DDRPHY register definitions
  ram: rockchip: rk3576: add DRAM controller and PHY driver
  ram: rockchip: rk3576: add LPDDR4 timing table placeholder (1560 MHz)
  ram: rockchip: rk3576: add LPDDR5 timing table placeholder (2133 MHz)
  arm: dts: rk3576: add DMC reg spaces and DDR GRF syscon node
  serial: rockchip: add DM_DRIVER_ALIAS for RK3576 UART
  arm: rockchip: rk3576: enable TPL DRAM init in Kconfig and defconfig

 arch/arm/dts/rk3576-u-boot.dtsi               |  15 +-
 arch/arm/include/asm/arch-rockchip/clock.h    |   1 +
 .../asm/arch-rockchip/sdram_pctl_rk3576.h     | 303 ++++++++
 .../asm/arch-rockchip/sdram_phy_rk3576.h      | 363 ++++++++++
 .../include/asm/arch-rockchip/sdram_rk3576.h  | 235 +++++++
 arch/arm/mach-rockchip/Kconfig                |  11 +
 arch/arm/mach-rockchip/rk3576/Kconfig         |   3 +
 arch/arm/mach-rockchip/rk3576/syscon_rk3576.c |   4 +-
 configs/sige5-rk3576_defconfig                |   3 +
 drivers/clk/rockchip/clk_rk3576.c             |  24 +-
 drivers/ram/rockchip/Kconfig                  |   7 +
 .../sdram-rk3576-lpddr4-detect-1560.inc       | 170 +++++
 .../sdram-rk3576-lpddr5-detect-2133.inc       | 174 +++++
 drivers/ram/rockchip/sdram_common.c           |  11 +-
 drivers/ram/rockchip/sdram_rk3576.c           | 655 +++++++++++++++++-
 drivers/serial/serial_rockchip.c              |   1 +
 drivers/sysreset/Makefile                     |   2 +
 17 files changed, 1963 insertions(+), 19 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-rockchip/sdram_pctl_rk3576.h
 create mode 100644 arch/arm/include/asm/arch-rockchip/sdram_phy_rk3576.h
 create mode 100644 arch/arm/include/asm/arch-rockchip/sdram_rk3576.h
 create mode 100644 drivers/ram/rockchip/sdram-rk3576-lpddr4-detect-1560.inc
 create mode 100644 drivers/ram/rockchip/sdram-rk3576-lpddr5-detect-2133.inc

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