[PATCH v4 1/4] imx9: Add support for saving DDR training data to NVM

[Emanuele Ghidoli]

On 4/30/26 10:33, Simona Toaca (OSS) wrote:
> From: Simona Toaca <simona.toaca at nxp.com>
> 
> +/**
> + * This structure needs to be aligned with the one in OEI.
> + */
> +struct ddrphy_qb_state {
> +	u32 crc;		  /* Used for ensuring integrity in DRAM */
> +#define MAC_LENGTH		8 /* 256 bits, 32-bit aligned */
> +	u32 mac[MAC_LENGTH];	  /* For 95A0/1 use mac[0] to keep CRC32 value */
> +	u8 trained_vrefca_a0;
> +	u8 trained_vrefca_a1;
> +	u8 trained_vrefca_b0;
> +	u8 trained_vrefca_b1;
> +	u8 trained_vrefdq_a0;
> +	u8 trained_vrefdq_a1;
> +	u8 trained_vrefdq_b0;
> +	u8 trained_vrefdq_b1;
> +	u8 trained_vrefdqu_a0;
> +	u8 trained_vrefdqu_a1;
> +	u8 trained_vrefdqu_b0;
> +	u8 trained_vrefdqu_b1;
> +	u8 trained_dramdfe_a0;
> +	u8 trained_dramdfe_a1;
> +	u8 trained_dramdfe_b0;
> +	u8 trained_dramdfe_b1;
> +	u8 trained_dramdca_a0;
> +	u8 trained_dramdca_a1;
> +	u8 trained_dramdca_b0;
> +	u8 trained_dramdca_b1;
> +	u16 qb_pll_upll_prog0;
> +	u16 qb_pll_upll_prog1;
> +	u16 qb_pll_upll_prog2;
> +	u16 qb_pll_upll_prog3;
> +	u16 qb_pll_ctrl1;
> +	u16 qb_pll_ctrl4;
> +	u16 qb_pll_ctrl5;
> +	u16 csr[DDRPHY_QB_CSR_SIZE];
> +	u16 acsm[DDRPHY_QB_ACSM_SIZE];
> +	u16 pst[DDRPHY_QB_PST_SIZE];
> +};

Hi Simona,

Would you consider reserving a small u16 board-defined field at the
end of struct ddrphy_qb_state? Something like:

	u16 board_ddr_config;	/* board-defined tag, opaque to U-Boot */

Use case: boards that carry multiple LPDDR configurations
(single-/dual-rank, different sizes, ...). At QuickBoot time the
boot code needs to know which configuration produced the persisted
PHY training data, in order to load the matching timing table
before DDRC init, in OEI. A 16-bit board-defined identifier is enough; the
value is opaque to U-Boot.

A generic placeholder is equally fine for our purpose, so each
board/vendor can use it as they see fit.

Cost on the persisted blob is essentially zero: mac[] (u32) forces
4-byte struct alignment, which already leaves 2 bytes of trailing
padding in the current layout. Adding a u16 field there does not
change sizeof(struct ddrphy_qb_state) nor the on-storage size.

Thanks,
Emanuele