[U-Boot-Users] [PATCH 1/1] Fix 8313ERDB board configuration

[Wolfgang Denk]

In message <12108831871831-git-send-email-yorksun at freescale.com> you wrote:
> Change LCRR clock ratio from 2 to 4 to commodate VSC7385.
> Correct TSEC1 vs TSEC2 assignment.
> Define ETHADDR and ETH1ADDR always.
> 
> Signed-off-by: York Sun <yorksun at freescale.com>
> Signed-off-by: Timur Tabi <timur at freescale.com>
> ---
>  include/configs/MPC8313ERDB.h |   14 ++++++--------
>  1 files changed, 6 insertions(+), 8 deletions(-)

Applied.

Please keep the review comments in mind, and send a follow-up patch
ASAP.

Best regards,

Wolfgang Denk

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