[U-Boot] [u-boot] Problem with exceptions in i.mx27.

[javier Martin]

In my custom i.mx27 based board am having data_abort exceptions. As I
could find from arm library code, a simple dump showing last register
values should happen to the console, since it is coded so in
data_abort handler.
So, why is not i.mx27 triggering the data_abort exception handler?

I did some tests on i.mx27 litekit board, where I forced a data_abort
exception trying to access to a NULL pointer. What I found is that
dump wasn't shown on this board neither.

Then, I disassembled code in the internal ROM of the i.MX27 where
lowest level exception vectors should be placed and I found the
following:

0x00000000	0xe59ff00c	LDR r15, [r15, #0xc]
0x00000004      0xe51ff11c	LDR r15, [r15, #-0x11c]
0x00000008      0xe51ff11c	LDR r15, [r15, #-0x11c]
0x0000000c	0xe51ff11c	LDR r15, [r15, #-0x11c]
0x00000010	0xe51ff11c	LDR r15, [r15, #-0x11c]
0x00000014	0xc0000000	ANDGT r0, r0, r0
0x00000018	0xe51ff120	LDR r15, [r15, #-0x120]
0x0000001c	0xe51ff120	LDR r15, [r15, #-0x120]

This means that u-boot exception vector address should be located in
the internal vRAM (0xFFFF_4C00 - 0xFFFF_FFFF). I solved the problem
adding an assembler macro in lowlevel_init.S for the imx27lite board:

--
diff --git a/board/logicpd/imx27lite/lowlevel_init.S
b/board/logicpd/imx27lite/lowlevel_init.S
index e2cdecb..8419471 100644
--- a/board/logicpd/imx27lite/lowlevel_init.S
+++ b/board/logicpd/imx27lite/lowlevel_init.S
@@ -40,6 +40,19 @@ SDRAM_LOADMODE_CMD_W:        .word   (ESDCTL_SDE |
ESDCTL_SMODE_LOAD_MODE | \
                                 ESDCTL_ROW13 | ESDCTL_COL10)
 SDRAM_NORMAL_CMD_W:    .word   SDRAM_ESDCTL_REGISTER_VAL

+.macro init_vram_vectors
+       /* TODO:
+        *      - Find a proper place to do this for all i.mx27 chips.
+        *      - Calculate Exception vector address in RAM using some
parameter.
+        */
+       write32 0xfffffef0, 0xa7f00004  /* Undefined interrupt handler */
+       write32 0xfffffef4, 0xa7f00008  /* Software interrupt handler */
+       write32 0xfffffef8, 0xa7f0000c  /* Prefetch abort handler */
+       write32 0xfffffefc, 0xa7f00010  /* Data abort handler */
+       write32 0xffffff00, 0xa7f00018  /* Default IRQ handler */
+       write32 0xffffff04, 0xa7f0001c  /* Default FIQ handler */
+.endm /* init vram vectors */
+
 .macro init_aipi
        /*
         * setup AIPI1 and AIPI2
@@ -167,4 +180,6 @@ lowlevel_init:

        sdram_init

+       init_vram_vectors
+
        mov     pc,r10
--

I am aware that this patch is not probably the proper way of doing
this but I'd like to know:

Has anyone got the same problem? Please, try to force and exception
and see if a dump is generated, if not, apply this patch and confirm
results.

If this is a generalized problem, which would be a good place to do it?

Comments are much appreciated.
Thank you.
-- 
Javier Martin
Vista Silicon S.L.
CDTUC - FASE C - Oficina S-345
Avda de los Castros s/n
39005- Santander. Cantabria. Spain
+34 942 25 32 60
www.vista-silicon.com