[U-Boot] [PATCH 4/7] ppc/p4080: CoreNet platfrom style secondary core release

[Kumar Gala]

On Sep 22, 2009, at 3:07 PM, Wolfgang Denk wrote:

> Dear Kumar Gala,
>
> In message <1253307595-28655-5-git-send-email-galak at kernel.crashing.org 
> > you wrote:
>> The CoreNet platform style of bringing secondary cores out of reset  
>> is
>> a bit different that the PQ3 style.  Mostly the registers that we use
>> to setup boot translation, enable time bases, and boot release the  
>> cores
>> have moved around.
>>
>> Signed-off-by: Kumar Gala <galak at kernel.crashing.org>
>> ---
>> cpu/mpc85xx/mp.c |   68 ++++++++++++++++++++++++++++++++++++++++++++ 
>> +++++++++-
>> 1 files changed, 67 insertions(+), 1 deletions(-)
>>
>> diff --git a/cpu/mpc85xx/mp.c b/cpu/mpc85xx/mp.c
>> index fa65bed..b474218 100644
>> --- a/cpu/mpc85xx/mp.c
>> +++ b/cpu/mpc85xx/mp.c
>> @@ -26,6 +26,7 @@
>> #include <lmb.h>
>> #include <asm/io.h>
>> #include <asm/mmu.h>
>> +#include <asm/fsl_law.h>
>> #include "mp.h"
>>
>> DECLARE_GLOBAL_DATA_PTR;
>> @@ -135,6 +136,66 @@ ulong get_spin_addr(void)
>> 	return addr;
>> }
>>
>> +#ifdef CONFIG_FSL_CORENET
>> +static void corenet_mp_up(unsigned long bootpg)
>> +{
>> +	u32 up, cpu_up_mask, whoami;
>> +	u32 *table = (u32 *)get_spin_addr();
>> +	volatile ccsr_gur_t *gur;
>> +	volatile ccsr_local_t *ccm;
>> +	volatile ccsr_rcpm_t *rcpm;
>> +	volatile ccsr_pic_t *pic;
>> +	int timeout = 10;
>> +	u32 nr_cpus;
>> +	struct law_entry e;
>> +
>> +	gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
>> +	ccm = (void *)(CONFIG_SYS_FSL_CORENET_CCM_ADDR);
>> +	rcpm = (void *)(CONFIG_SYS_FSL_CORENET_RCPM_ADDR);
>> +	pic = (void *)(CONFIG_SYS_MPC85xx_PIC_ADDR);
>> +
>> +	nr_cpus = ((in_be32(&pic->frr) >> 8) & 0xff) + 1;
>> +
>> +	whoami = in_be32(&pic->whoami);
>> +	cpu_up_mask = 1 << whoami;
>> +	out_be32(&ccm->bstrl, bootpg);
>> +
>> +	e = find_law(bootpg);
>> +	out_be32(&ccm->bstrar, LAWAR_EN | e.trgt_id << 20 | LAWAR_SIZE_4K);
>> +
>> +	/* disable time base at the platform */
>> +	out_be32(&rcpm->ctbenrl, cpu_up_mask);
>> +
>> +	/* release the hounds */
>> +	up = ((1 << nr_cpus) - 1);
>> +	out_be32(&gur->brrl, up);
>> +
>> +	/* wait for everyone */
>> +	while (timeout) {
>> +		int i;
>> +		for (i = 0; i < nr_cpus; i++) {
>> +			if (table[i * NUM_BOOT_ENTRY + BOOT_ENTRY_ADDR_LOWER])
>> +				cpu_up_mask |= (1 << i);
>> +		};
>> +
>> +		if ((cpu_up_mask & up) == up)
>> +			break;
>> +
>> +		udelay(100);
>> +		timeout--;
>> +	}
>> +
>> +	if (timeout == 0)
>> +		printf("CPU up timeout. CPU up mask is %x should be %x\n",
>> +			cpu_up_mask, up);
>> +
>> +	/* enable time base at the platform */
>> +	out_be32(&rcpm->ctbenrl, 0);
>> +	mtspr(SPRN_TBWU, 0);
>> +	mtspr(SPRN_TBWL, 0);
>> +	out_be32(&rcpm->ctbenrl, (1 << nr_cpus) - 1);
>> +}
>> +#else
>> static void pq3_mp_up(unsigned long bootpg)
>> {
>> 	u32 up, cpu_up_mask, whoami;
>> @@ -196,6 +257,7 @@ static void pq3_mp_up(unsigned long bootpg)
>> 	devdisr &= ~(MPC85xx_DEVDISR_TB0 | MPC85xx_DEVDISR_TB1);
>> 	out_be32(&gur->devdisr, devdisr);
>> }
>> +#endif
>
> This is becoming a terrible mess of #ifdef's.  Would it not make sense
> to move the new code into separate files?

Is this a general comment or specific to this patch?

In general I would say no.  In this specific case we only have two  
#ifdef's.  I can remove the one at the call site by naming the  
functions the same thing if desired.

- k

- k