[ELDK] MCV hardware

Pavel Machek pavel at denx.de
Wed Jul 8 14:58:27 CEST 2015


On Wed 2015-07-08 12:05:05, Egor wrote:
> Pavel Machek <pavel at ...> writes:
> 
> > 
> > On Tue 2015-07-07 15:04:16, Egor wrote:
> > > Pavel Machek <pavel <at> ...> writes:
> > > 
> > > > 
> > > > You may want to try to access that register from u-boot first, then
> > > > under linux using devmem2 tool... for debugging.
> > > > 								Pavel
> > > 
> > > I try
> > > 
> > > => md 0xff2800A0 4
> > > and got
> > > ff2800a0:
> > > 
> > > and the system is freezes
> > > 
> > > => md 0x00008000 4
> > > said
> > > 00008000: eb003e36 e10f9000 e229901a e319001f
> > > 
> > > so, md is OK, but ff2800a0 is inaccessible
> > 
> > Ok, it looks like you need to figure out why it does not work in
> > u-boot, first. What is supposed to be at that address?
> > 								Pavel
> 
> I use HPS from reference design.
> I've change FPGA partnumber and remove pins not present in my FPGA 
> 5CSEBA2U23C8.
> address map for Altera PIO named IOB3B from mcv_hps datasheet generated 
> with reference design says
> 
>     hps_0            hps_0_bridges    hps_0_arm_a9_0
>     h2f_lw_axi_master    axi_f2h        altera_axi_master
> 
> ...
> pio_iob3b (s1)
>     0x000800a0        -        0xff2800a0
> ...
> sysid (control_slave)
>     0x00080000        -        0xff280000
> ...
> 
> and I try to read this addresses

So the register is implemented in the FPGA, right? Do you have netlist
loaded? Do you have bridges enabled? ("bridge enable" in recent u-boot).

> pio_iob3b is bidirectional peripheral IO. Reading from offset 0 should 
> return inputs of PIO.
> 
> Moreover, if to boot kernel with dtb from reference design, system fails.
> I have put pio's from reference design dtb into sopc at 0 of dtb from 
> ftp.denx.de/pub/eldk/5.6/targets/mcvevk.
> 
> bridge at 0xc0000000 {
>     compatible = "altr,bridge-15.0", "simple-bus";
>     reg = <0xc0000000 0x20000000 0xff200000 0x200000>;
>     reg-names = "axi_h2f", "axi_h2f_lw";
>     clocks = <0x1 0x1>;
>     clock-names = "h2f_axi_clock", "h2f_lw_axi_clock";
>     #address-cells = <0x2>;
>     #size-cells = <0x1>;
>     ranges = <
>     0x0 0x0 0xc0000000 0x20000
>     0x1 0x80000 0xff280000 0x8
> ...
>     0x1 0x800a0 0xff2800a0 0x10
> ...
>     0x1 0x80100 0xff280100 0x10>;
>

Yup, and this bridge may or may not be mapped in the address space...

								Pavel


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