[U-Boot-Users] Re: Interrupt management under PPC4xx platform

llandre r&d at wawnet.biz
Mon Apr 14 17:22:26 CEST 2003

>In message <EFEAIMDCOOOHIEPHDNFJCEEJFFAA.stefan.roese at esd-electronics.com> 
>you wrote:
> >
> > The EVPR is set to zero by U-Boot since the interrupts (exceptions) are
> > enabled when U-Boot is running from SDRAM and _not_ from flash anymore
> > (Wolfgang, please correct me, if I am wrong here). The exception 
> vectors are
>This is correct.
> > The interrupt management for PPC4xx in U-Boot is OK! We have several
> > different boards with IBM PPC's (PPC405CR, PPC405GP, PPC405GPr) running
> > without any problems here (timer and ethernet interrupts working).
>Same here.
> > Are you sure, that the interrupts are causing this "unstable" behaviour? I
> > would suspect, that other exceptions are responsible for this errors?
>Right, and as usual I would suspect SDRAM initialization first.
>Thanks, Stefan!

I found a first problem in the trap_init function. Here is the situation 
before the instruction
rlwinm r9, r7, 0, 18, 31:

r7 = 0x7fce100
CFG_MONITOR_LEN = 200*1024

So r9, that contains the target address, is set to 0x2100 and consequently 
the vectors are placed starting from there.
If  change CFG_MONITOR_LEN to 192*1024 they are copied to the right place 
(0x100, anybody corrects me if I'm wrong) and the PIT interrupt is ok. 
Nevertheless the problem with Ethernet still occurs:

### main_loop: bootcmd="tftpboot 0x400000 vmlinux.PPCBoot"
Hit any key to stop autoboot:  0
ENET Speed is 10 Mbps - HALF duplex connection
ARP broadcast 1

With Ethereal I monitor the LAN traffic and I can see that the PC correctly 
answers to the ARP request. The SDRAM controller should be ok because I 
imported the initialization code from OpenBIOS. I suspect there are some 
slight differences in the Ethernet controller across the 405xx processors 
(I use a 405EP). I think I should investigate the Ethernet code. Where do 
you suggest me to start?


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