[U-Boot-Users] Re: Interrupt management under PPC4xx platform

[Wolfgang Denk]

In message <EFEAIMDCOOOHIEPHDNFJCEEJFFAA.stefan.roese at esd-electronics.com> you wrote:
> 
> The EVPR is set to zero by U-Boot since the interrupts (exceptions) are
> enabled when U-Boot is running from SDRAM and _not_ from flash anymore
> (Wolfgang, please correct me, if I am wrong here). The exception vectors are

This is correct.

> The interrupt management for PPC4xx in U-Boot is OK! We have several
> different boards with IBM PPC's (PPC405CR, PPC405GP, PPC405GPr) running
> without any problems here (timer and ethernet interrupts working).

Same here.

> Are you sure, that the interrupts are causing this "unstable" behaviour? I
> would suspect, that other exceptions are responsible for this errors?

Right, and as usual I would suspect SDRAM initialization first.


Thanks, Stefan!


Wolfgang Denk

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