[U-Boot-Users] possible problem in u-boot-0.2.0/cpu/mpc8xx/cpu_init.c

Wolfgang Denk wd at denx.de
Wed Feb 5 10:41:06 CET 2003

In message <00eb01c2ccf7$3b7bc230$6d4ba8c0 at alb.sub.de> you wrote:
> I am just porting u-boot to our TOP860 module, which uses 50MHz/80Mhz
> core clock and 25MHz/40MHz Bus Clock (EBDF=1).

Is your HRCW set that way, too?

> I noticed that in cpu_init.c/line 77ff the PLPRCR is written before SCCR
> which will cause the CLKOUT to ramp up to 50 MHz before it is being
> reduced to half the frequency. That might violate alot of timings. It
> does not appear to cause any problems right now; but I would suggest
> anyway to change the order there.

You are not supposed to change the EBDF setting. The code reads:

     91         /* System integration timers. Don't change EBDF! (15-27) */

Best regards,

Wolfgang Denk

Software Engineering:  Embedded and Realtime Systems,  Embedded Linux
Phone: (+49)-8142-4596-87  Fax: (+49)-8142-4596-88  Email: wd at denx.de
Unix is supported by IBM, like a hanging man is supported by rope.
		        - Don Libes & Sandy Ressler: _Life With Unix_

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