[U-Boot-Users] Réf. : Re: Newbie question

[Wolfgang Denk]

Dear Cedric,

in message <OFCA2AEF16.9B382015-ONC1256CED.0028B955-C1256CED.002ADFE7 at polesdel> you wrote:
> 
> I try a memory test with rotate patern on my SDRAM with my logic analyser 
> and no problem happen.

This will probably not cause RAM accesses in burst  mode,  so  it  is
useless here.

> But I will try some different initialisation of my SDRAM.

Follow the instructions in the chip manufacturer's  documentation  to
the very detail.

> How can I disable instruction and data cache for the SDRAM to test ?

Data cache is disabled anyway. To disable the IC, just  don't  enable
it (in start.S - search for "Enable instruction cache").

But it should be sufficient to set  the  Burst  Inhibit  bit  in  the
memory controller.


Note that you will have to solve this problem.  Do  it  now.  Do  not
yield  to  the  temptation  to continue doing other things before you
solved this.

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> <br><font size=2 face="sans-serif">Thanks to you and Wolfgang to answer.</font>

And please stop sending HTML!


Wolfgang Denk

-- 
Software Engineering:  Embedded and Realtime Systems,  Embedded Linux
Phone: (+49)-8142-4596-87  Fax: (+49)-8142-4596-88  Email: wd at denx.de
What is wanted is not the will to believe,  but the will to find out,
which is the exact opposite.
		        -- Bertrand Russell, "Skeptical Essays", 1928