[U-Boot-Users] Patch: MPC826xADS/PQ2FADS small fixes and clean-up

Yuli Barcohen yuli at arabellasw.com
Thu Nov 13 18:31:51 CET 2003


This patch fixes the MPC826xADS/PQ2FADS port to run cleanly on
MPC8266ADS. Also some defaults are changed to match Motorola shipping
configuration.

-- 
========================================================================
 Yuli Barcohen       | Phone +972-9-765-1788 |  Software Project Leader
 yuli at arabellasw.com | Fax   +972-9-765-7494 | Arabella Software, Israel
========================================================================
-------------- next part --------------
Index: board/mpc8260ads/config.mk
===================================================================
RCS file: /home/CVS/u-boot/u-boot/board/mpc8260ads/config.mk,v
retrieving revision 1.1.1.1
retrieving revision 1.2
diff -p -u -r1.1.1.1 -r1.2
--- board/mpc8260ads/config.mk	10 Oct 2001 09:28:28 -0000	1.1.1.1
+++ board/mpc8260ads/config.mk	13 Nov 2003 17:15:22 -0000	1.2
@@ -4,6 +4,8 @@
 #
 # Modified by, Stuart Hughes, Lineo Inc, stuarth at lineo.com
 #
+# Modified by, Yuli Barcohen, Arabella Software Ltd., yuli at arabellasw.com
+#
 # See file CREDITS for list of people who contributed to this
 # project.
 #
@@ -24,9 +26,7 @@
 #
 
 #
-# mpc8260ads board
+# MPC8260ADS, MPC8266ADS, and PQ2FADS-ZU/VR boards
 #
 
 TEXT_BASE = 0xfff00000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
Index: board/mpc8260ads/mpc8260ads.c
===================================================================
RCS file: /home/CVS/u-boot/u-boot/board/mpc8260ads/mpc8260ads.c,v
retrieving revision 1.1.1.6
retrieving revision 1.10
diff -p -u -r1.1.1.6 -r1.10
--- board/mpc8260ads/mpc8260ads.c	15 Sep 2003 20:30:40 -0000	1.1.1.6
+++ board/mpc8260ads/mpc8260ads.c	13 Nov 2003 17:15:22 -0000	1.10
@@ -231,6 +231,20 @@ int board_pre_init (void)
 
 	bcsr[1] = ~FETHIEN1 & ~RS232EN_1;
 
+#if CONFIG_ADSTYPE != CFG_8260ADS /* PCI mode can be selected */
+#if CONFIG_ADSTYPE == CFG_PQ2FADS
+	if ((bcsr[3] & BCSR_PCI_MODE) == 0) /* PCI mode selected by JP9 */
+#endif /* CONFIG_ADSTYPE == CFG_PQ2FADS */
+	{
+		volatile immap_t *immap = (immap_t *) CFG_IMMR;
+
+		immap->im_clkrst.car_sccr |= M826X_SCCR_PCI_MODE_EN;
+		immap->im_siu_conf.sc_siumcr =
+			(immap->im_siu_conf.sc_siumcr & ~SIUMCR_LBPC11)
+			| SIUMCR_LBPC01;
+	}
+#endif /* CONFIG_ADSTYPE != CFG_8260ADS */
+
 	return 0;
 }
 
@@ -239,32 +253,25 @@ int board_pre_init (void)
 long int initdram (int board_type)
 {
 #if CONFIG_ADSTYPE == CFG_PQ2FADS
-	vu_long *bcsr = (vu_long *)CFG_BCSR;
+	long int msize = 32;
+#else
+	long int msize = 16;
 #endif
+
+#ifndef CFG_RAMBOOT
 	volatile immap_t *immap = (immap_t *) CFG_IMMR;
 	volatile memctl8260_t *memctl = &immap->im_memctl;
 	volatile uchar *ramaddr, c = 0xff;
-	long int msize;
 	uint or;
 	uint psdmr;
 	uint psrt;
 
 	int i;
 
-#ifndef CFG_RAMBOOT
 	immap->im_siu_conf.sc_ppc_acr  = 0x00000002;
 	immap->im_siu_conf.sc_ppc_alrh = 0x01267893;
 	immap->im_siu_conf.sc_tescr1   = 0x00004000;
 
-#if CONFIG_ADSTYPE == CFG_PQ2FADS
-	if ((bcsr[3] & BCSR_PCI_MODE) == 0) { /* PCI mode selected by JP9 */
-		immap->im_clkrst.car_sccr |= M826X_SCCR_PCI_MODE_EN;
-		immap->im_siu_conf.sc_siumcr =
-			(immap->im_siu_conf.sc_siumcr & ~SIUMCR_LBPC11)
-			| SIUMCR_LBPC01;
-	}
-#endif /* CONFIG_ADSTYPE == CFG_PQ2FADS */
-
 	memctl->memc_mptpr = CFG_MPTPR;
 #ifdef CFG_LSDRAM_BASE
 	/*
@@ -431,13 +438,7 @@ long int initdram (int board_type)
 #endif /* SPD_DEBUG */
 	}
 #else  /* !CONFIG_SPD_EEPROM */
-#if CONFIG_ADSTYPE == CFG_PQ2FADS
-	msize = 32;
-	or = 0xFE002EC0;
-#else
-	msize = 16;
-	or = 0xFF000CA0;
-#endif /* CONFIG_ADSTYPE == CFG_PQ2FADS */
+	or    = CFG_OR2;
 	psdmr = CFG_PSDMR;
 	psrt  = CFG_PSRT;
 #endif /* CONFIG_SPD_EEPROM */
@@ -455,7 +456,7 @@ long int initdram (int board_type)
 	*ramaddr = c;
 	memctl->memc_psdmr = psdmr | 0x40000000;	/* Refresh enable */
 	*ramaddr = c;
-#endif
+#endif /* CFG_RAMBOOT */
 
 	/* return total 60x bus SDRAM size */
 	return (msize * 1024 * 1024);
Index: board/mpc8260ads/u-boot.lds
===================================================================
RCS file: /home/CVS/u-boot/u-boot/board/mpc8260ads/u-boot.lds,v
retrieving revision 1.1.1.3
retrieving revision 1.2
diff -p -u -r1.1.1.3 -r1.2
--- board/mpc8260ads/u-boot.lds	16 Jul 2003 11:23:42 -0000	1.1.1.3
+++ board/mpc8260ads/u-boot.lds	13 Nov 2003 17:15:22 -0000	1.2
@@ -2,6 +2,8 @@
  * (C) Copyright 2001
  * Wolfgang Denk, DENX Software Engineering, wd at denx.de.
  *
+ * Modified by Yuli Barcohen <yuli at arabellasw.com>
+ *
  * See file CREDITS for list of people who contributed to this
  * project.
  *
@@ -22,9 +24,6 @@
  */
 
 OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
-   __DYNAMIC = 0;    */
 SECTIONS
 {
   /* Read-only sections, merged into text segment: */
@@ -120,3 +119,4 @@ SECTIONS
   _end = . ;
   PROVIDE (end = .);
 }
+ENTRY(_start)
Index: include/configs/MPC8260ADS.h
===================================================================
RCS file: /home/CVS/u-boot/u-boot/include/configs/MPC8260ADS.h,v
retrieving revision 1.1.1.6
retrieving revision 1.14
diff -p -u -r1.1.1.6 -r1.14
--- include/configs/MPC8260ADS.h	15 Sep 2003 20:30:43 -0000	1.1.1.6
+++ include/configs/MPC8260ADS.h	13 Nov 2003 17:15:22 -0000	1.14
@@ -10,7 +10,7 @@
  * (C) Copyright 2003 Arabella Software Ltd.
  * Yuli Barcohen <yuli at arabellasw.com>
  * Added support for SDRAM DIMMs SPD EEPROM, MII, JFFS2.
- * Ported to PQ2FADS-ZU board.
+ * Ported to PQ2FADS-ZU and PQ2FADS-VR boards.
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -45,7 +45,7 @@
 /* ADS flavours */
 #define CFG_8260ADS		1	/* MPC8260ADS */
 #define CFG_8266ADS		2	/* MPC8266ADS */
-#define CFG_PQ2FADS		3	/* PQ2FADS-ZU */
+#define CFG_PQ2FADS		3	/* PQ2FADS-ZU or PQ2FADS-VR */
 
 #ifndef CONFIG_ADSTYPE
 #define CONFIG_ADSTYPE		CFG_8260ADS
@@ -130,7 +130,7 @@
 #undef CONFIG_SPD_EEPROM	/* On PQ2FADS-ZU, SDRAM is soldered  */
 #else
 #define CONFIG_HARD_I2C		1	/* To enable I2C support	*/
-#define CFG_I2C_SPEED		400000	/* I2C speed and slave address	*/
+#define CFG_I2C_SPEED		100000	/* I2C speed and slave address	*/
 #define CFG_I2C_SLAVE		0x7F
 
 #if defined(CONFIG_SPD_EEPROM) && !defined(CONFIG_SPD_ADDR)
@@ -139,14 +139,14 @@
 #endif /* CONFIG_ADSTYPE == CFG_PQ2FADS */
 
 #ifndef CONFIG_SDRAM_PBI
-#define CONFIG_SDRAM_PBI        1 /* By default, use page-based interleaving */
+#define CONFIG_SDRAM_PBI        0 /* By default, use bank-based interleaving */
 #endif
 
 #ifndef CONFIG_8260_CLKIN
 #if CONFIG_ADSTYPE == CFG_PQ2FADS
 #define CONFIG_8260_CLKIN	100000000	/* in Hz */
 #else
-#define CONFIG_8260_CLKIN	66666666	/* in Hz */
+#define CONFIG_8260_CLKIN	66000000	/* in Hz */
 #endif
 #endif
 
@@ -188,7 +188,6 @@
 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
 #include <cmd_confdefs.h>
 
-
 #define CONFIG_BOOTDELAY	5	/* autoboot after 5 seconds */
 #define CONFIG_BOOTCOMMAND	"bootm 100000"	/* autoboot command */
 #define CONFIG_BOOTARGS		"root=/dev/ram rw"
@@ -201,7 +200,8 @@
 #define CONFIG_KGDB_BAUDRATE	115200	/* speed to run kgdb serial port at */
 #endif
 
-#undef	CONFIG_WATCHDOG			/* disable platform specific watchdog */
+#define CONFIG_BZIP2	/* include support for bzip2 compressed images */
+#undef	CONFIG_WATCHDOG	/* disable platform specific watchdog */
 
 /*
  * Miscellaneous configurable options
@@ -291,9 +291,14 @@
 #endif
 
 #define CFG_MONITOR_LEN		(256 << 10)	/* Reserve 256 kB for Monitor	*/
-#define CFG_MALLOC_LEN		(128 << 10)	/* Reserve 128 kB for malloc()	*/
 #define CFG_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */
 
+#ifdef CONFIG_BZIP2
+#define CFG_MALLOC_LEN		(4096 << 10)	/* Reserve 4 MB for malloc()	*/
+#else
+#define CFG_MALLOC_LEN		(128 << 10)	/* Reserve 128 KB for malloc()	*/
+#endif /* CONFIG_BZIP2 */
+
 #ifndef CFG_RAMBOOT
 #  define CFG_ENV_IS_IN_FLASH	1
 #  define CFG_ENV_SECT_SIZE	0x40000
@@ -335,12 +340,14 @@
 #endif /* CONFIG_ADSTYPE == CFG_8266ADS */
 
 #if CONFIG_ADSTYPE == CFG_PQ2FADS
+#define CFG_OR2			0xFE002EC0
 #define CFG_PSDMR		0x824B36A3
 #define CFG_PSRT		0x13
 #define CFG_LSDMR		0x828737A3
 #define CFG_LSRT		0x13
 #define CFG_MPTPR		0x2800
 #else
+#define CFG_OR2			0xFF000CA0
 #define CFG_PSDMR		0x016EB452
 #define CFG_PSRT		0x21
 #define CFG_LSDMR		0x0086A522


More information about the U-Boot mailing list