[U-Boot-Users] need help for LAN91C111 driver

Robert Schwebel robert at schwebel.de
Tue Oct 28 14:28:02 CET 2003

On Tue, Oct 28, 2003 at 02:03:42PM +0100, Stephan Linz wrote:
> PHY_INT_REG is an read only register (all bits). So I don't understand the 
> write access -- Why? Can anybody explain this step?
> I think the corregt register have to be PHY_MASK_REG (register 19), which 
> correspond to PHY_INT_REG (register 18) as interrupt mask.

I assume you are right - at least that is how we have fixed it in our
-ptx patch. Unfortunately I didn't find the time to push everything
upstream yet :-( 

 Dipl.-Ing. Robert Schwebel | http://www.pengutronix.de
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