[U-Boot-Users] mtest

[VanBaren, Gerald (AGRE)]

> -----Original Message-----
> From: u-boot-users-admin at lists.sourceforge.net
> [mailto:u-boot-users-admin at lists.sourceforge.net]On Behalf Of himbA
> Sent: Friday, April 02, 2004 7:04 AM
> To: u-boot-users at lists.sourceforge.net
> Subject: Re: [U-Boot-Users] mtest
>
>
> Wolfgang Denk wrote:
>
> > Sorry, my crystal ball is in dire need of an ectoplasmic upgrade. :-)
> >
>
> :)
>
> OK, I did some more research - my SDRAM config is
> PHYS_SDRAM_1            0xa0000000
> PHYS_SDRAM_1_SIZE       0x04000000
> CFG_DRAM_BASE           0xa0000000
> CFG_DRAM_SIZE           0x04000000
>
> those memory errors mentioned in earlier post do
> not appear if I change CFG_MEMTEST_END from
> 0xa3efffff (- 63M) to 0xa3dfffff (- 62M).
> CFG_MEMTEST_START = 0xa0100000 (1M -). In
> config.mk TEXT_BASE = 0xa3f00000.
>
> at bootup uboot displays
> U-Boot code: A3F00000 -> A3F177B8  BSS: -> A3F1BAD8
>
> Is there some uboot relevant stuff between
> 0xa3efffff - 0xa3dfffff that I run over when doing
> mtest on all 63Mb? Code and stack seem to be safe.
>
> regards, himba
> --
> ..because under Linux "if something is possible in
> principle,
> then it is already implemented or somebody is
> working on it".
> 							--LKI


Dear LKI:

Your initial message said the error messages were:

  Mem error @ 0xA3EDBAEC: found A3EDBB0C, expected 00F76EBB
  Mem error @ 0xA3EDBAF0: found A3EDBAFC, expected 00F76EBC
  Mem error @ 0xA3EDBAF4: found A3F1227C, expected 00F76EBD

Note that the "found" data consists mostly of the address.  This makes me think (not being familiar with the PXA255) that your processor has a multiplexed address & data bus and the memory (either itself or the data line buffers if you are using buffers) are not being enabled properly on the read cycle -- either late or not at all.  The result is that the address goes out on the bus and is still hanging around on the bus when the data gets latched in the processor.  The proper operation of the memory/buffers would be to drive the memory data onto the bus before the data is latched by the processor.

gvb



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