[U-Boot-Users] Re: u-boot 1.0.0+ PCI Bridge enumeration problem

Travis Sawyer tsawyer+u-boot at sandburst.com
Tue Jan 20 16:00:27 CET 2004

On Mon, 2004-01-19 at 17:06, Travis Sawyer wrote:
> I am having a problem with PCI 'plug-n-play', specifically with bridge
> setup.
> If I turn on CONFIG_PCI_PNP (in u-boot), the pci enumeration never
> stops.  I turned on DEBUG'ing in pci.c and pci_auto.c and added some
> debug prints to try to see what is going on, but I cannot figure out why
> it is seeing more than just the 3 21154 bridges.
> Any help would greatly be appreciated.
Looking through the archives, I bet its funny to see how many people
reply to their own posts...so I'll add another.

I'm not sure how this worked for (or if it even works for) any of the
ppc4xx ports with built in pci.

In pci_indirect.c:

#define INDIRECT_PCI_OP(rw, size, type, op, mask) \
static int					 \
indirect_##rw##_config_##size(struct pci_controller *hose,  \
			      pci_dev_t dev, int offset, type val) \
{								 \
	out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000); \
	cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \
	return 0;    					 	 \

In order to get config access across sub-bridges one must do config type
1 reads/writes.

Not knowing if this would break other ports, I've added a #elif
defined(CONFIG_440_GX) section that adds the following lines:

   if(PCI_BUS(dev) > 0) \
       	out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000001); \
       out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000); \

I'll send a patch when Wolfgang has submitted the 440GX port to CVS.

I hope this helps someone having the same difficulties in the

-travis sawyer

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