[U-Boot-Users] [PATCH] Updates for evb4510 (ARM7)
Curt Brune
curt at cucy.com
Wed Jul 7 02:25:11 CEST 2004
This patch is for the evb4510 target. The patch adds support for
a timer interrupt and cleans up the config header file for passing
boot arguments to linux.
u-boot/board/evb4510/evb4510.c
==============================
Removed code related to the non-interrupt method for timers.
u-boot/cpu/arm720t/interrupts.c
===============================
Added interrupt handling. Timer interrupt configuration.
u-boot/include/asm-arm/arch-arm720t/s3c4510b.h
==============================================
Added macros and constants related to interrupts
u-boot/include/configs/evb4510.h
================================
Changed boot args. Enabled CONFIG_CMDLINE_TAG,
CONFIG_SETUP_MEMORY_TAGS and CONFIG_INITRD_TAG
u-boot/lib_arm/armlinux.c
=========================
Copy the ramdisk to destination address for this target (similar to
the B2 target).
--
========================================================================
Curt Brune | Phone 1.650.380.2528 | Managing Principal
curt at cucy.com | WWW www.cucy.com | Cucy Systems
========================================================================
Cucy Systems -- Software. Integration. Training.
========================================================================
-------------- next part --------------
diff -purN new/u-boot/board/evb4510/evb4510.c u-boot/board/evb4510/evb4510.c
--- new/u-boot/board/evb4510/evb4510.c 2004-07-01 09:30:45.000000000 -0700
+++ u-boot/board/evb4510/evb4510.c 2004-07-06 10:56:30.000000000 -0700
@@ -25,13 +25,9 @@
#include <asm/hardware.h>
#include <command.h>
-/* ------------------------------------------------------------------------- */
-
+#ifdef CONFIG_EVB4510
-#define PUT_LED(val) (PUT_REG(REG_IOPDATA, (~val)&0xFF))
-#define GET_LED() ((~GET_REG( REG_IOPDATA)) & 0xFF)
-#define SET_LED(val) { u32 led = GET_LED(); led |= 1 << (val); PUT_LED( led); }
-#define CLR_LED(val) { u32 led = GET_LED(); led &= ~(1 << (val)); PUT_LED( led); }
+/* ------------------------------------------------------------------------- */
/*
* Miscelaneous platform dependent initialisations
@@ -51,25 +47,6 @@ int board_init (void)
PUT_REG( REG_IOPMODE, 0xFFFF);
PUT_REG( REG_IOPDATA, 0xFF);
- /* enable LED 7 to show we're alive */
- SET_LED( 7);
-
- /* configure free running timer 1 */
- /* Stop timer 1 */
- CLR_REG( REG_TMOD, TM1_RUN);
-
- /* Configure for toggle mode */
- SET_REG( REG_TMOD, TM1_TOGGLE);
-
- /* Load Timer data register with count down value */
- PUT_REG( REG_TDATA1, 0xFFFFFFFF);
-
- /* Clear timer counter register */
- PUT_REG( REG_TCNT1, 0x0);
-
- /* Start timer -- count down timer */
- SET_REG( REG_TMOD, TM1_RUN);
-
return 0;
}
@@ -84,3 +61,5 @@ int dram_init (void)
#endif
return 0;
}
+
+#endif
diff -purN new/u-boot/cpu/arm720t/interrupts.c u-boot/cpu/arm720t/interrupts.c
--- new/u-boot/cpu/arm720t/interrupts.c 2004-07-01 09:30:47.000000000 -0700
+++ u-boot/cpu/arm720t/interrupts.c 2004-07-06 10:57:22.000000000 -0700
@@ -46,6 +46,15 @@ extern void reset_cpu(ulong addr);
#define READ_TIMER (TM2STAT & NETARM_GEN_TSTAT_CTC_MASK)
#endif
+#ifdef CONFIG_S3C4510B
+/* require interrupts for the S3C4510B */
+#ifndef CONFIG_USE_IRQ
+#error CONFIG_USE_IRQ _must_ be defined when using CONFIG_S3C4510B
+#else
+static struct _irq_handler IRQ_HANDLER[N_IRQS];
+#endif
+#endif
+
#ifdef CONFIG_USE_IRQ
/* enable IRQ/FIQ interrupts */
void enable_interrupts (void)
@@ -75,7 +84,7 @@ int disable_interrupts (void)
: "memory");
return (old & 0x80) == 0;
}
-#else
+#else /* ifdef CONFIG_USE_IRQ */
void enable_interrupts (void)
{
return;
@@ -86,7 +95,6 @@ int disable_interrupts (void)
}
#endif
-
void bad_mode (void)
{
panic ("Resetting CPU ...\n");
@@ -174,10 +182,41 @@ void do_fiq (struct pt_regs *pt_regs)
void do_irq (struct pt_regs *pt_regs)
{
+#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_NETARM)
printf ("interrupt request\n");
show_regs (pt_regs);
bad_mode ();
+#elif defined(CONFIG_S3C4510B)
+ unsigned int pending;
+
+ while ( (pending = GET_REG( REG_INTOFFSET)) != 0x54) { /* sentinal value for no pending interrutps */
+ IRQ_HANDLER[pending>>2].m_func( IRQ_HANDLER[pending>>2].m_data);
+
+ /* clear pending interrupt */
+ PUT_REG( REG_INTPEND, (1<<(pending>>2)));
+ }
+#else
+#error do_irq() not defined for this CPU type
+#endif
+}
+
+
+#ifdef CONFIG_S3C4510B
+static void default_isr( void *data) {
+ printf ("default_isr(): called for IRQ %d\n", (int)data);
+}
+
+static void timer_isr( void *data) {
+ unsigned int *pTime = (unsigned int *)data;
+
+ (*pTime)++;
+ if ( !(*pTime % (CFG_HZ/4))) {
+ /* toggle LED 0 */
+ PUT_REG( REG_IOPDATA, GET_REG(REG_IOPDATA) ^ 0x1);
+ }
+
}
+#endif
static ulong timestamp;
static ulong lastdec;
@@ -209,8 +248,48 @@ int interrupt_init (void)
/* set timer 1 counter */
lastdec = IO_TC1D = TIMER_LOAD_VAL;
#elif defined(CONFIG_S3C4510B)
- /* Nothing to do, interrupts not supported */
+ int i;
+
+ /* install default interrupt handlers */
+ for ( i = 0; i < N_IRQS; i++) {
+ IRQ_HANDLER[i].m_data = (void *)i;
+ IRQ_HANDLER[i].m_func = default_isr;
+ }
+
+ /* configure interrupts for IRQ mode */
+ PUT_REG( REG_INTMODE, 0x0);
+ /* clear any pending interrupts */
+ PUT_REG( REG_INTPEND, 0x1FFFFF);
+
lastdec = 0;
+
+ /* install interrupt handler for timer */
+ IRQ_HANDLER[INT_TIMER0].m_data = (void *)×tamp;
+ IRQ_HANDLER[INT_TIMER0].m_func = timer_isr;
+
+ /* configure free running timer 0 */
+ PUT_REG( REG_TMOD, 0x0);
+ /* Stop timer 0 */
+ CLR_REG( REG_TMOD, TM0_RUN);
+
+ /* Configure for interval mode */
+ CLR_REG( REG_TMOD, TM1_TOGGLE);
+
+ /*
+ * Load Timer data register with count down value.
+ * count_down_val = CFG_SYS_CLK_FREQ/CFG_HZ
+ */
+ PUT_REG( REG_TDATA0, (CFG_SYS_CLK_FREQ / CFG_HZ));
+
+ /*
+ * Enable global interrupt
+ * Enable timer0 interrupt
+ */
+ CLR_REG( REG_INTMASK, ((1<<INT_GLOBAL) | (1<<INT_TIMER0)));
+
+ /* Start timer */
+ SET_REG( REG_TMOD, TM0_RUN);
+
#else
#error No interrupt_init() defined for this CPU type
#endif
@@ -294,40 +373,22 @@ void udelay_masked (unsigned long usec)
#elif defined(CONFIG_S3C4510B)
-#define TMR_OFFSET (0x1000)
+ulong get_timer (ulong base)
+{
+ return timestamp - base;
+}
void udelay (unsigned long usec)
{
- u32 rDATA;
+ u32 ticks;
- rDATA = t_data_us(usec);
-
- /* Stop timer 0 */
- CLR_REG( REG_TMOD, TM0_RUN);
+ ticks = (usec * CFG_HZ) / 1000000;
- /* Configure for toggle mode */
- SET_REG( REG_TMOD, TM0_TOGGLE);
+ ticks += get_timer (0);
- /* Load Timer data register with count down value plus offset */
- PUT_REG( REG_TDATA0, rDATA + TMR_OFFSET);
-
- /* Clear timer counter register */
- PUT_REG( REG_TCNT0, 0x0);
-
- /* Start timer -- count down timer */
- SET_REG( REG_TMOD, TM0_RUN);
-
- /* spin during count down */
- while ( GET_REG( REG_TCNT0) > TMR_OFFSET);
-
- /* Stop timer */
- CLR_REG( REG_TMOD, TM0_RUN);
-
-}
+ while (get_timer (0) < ticks)
+ /*NOP*/;
-ulong get_timer (ulong base)
-{
- return (0xFFFFFFFF - GET_REG( REG_TCNT1)) - base;
}
#else
diff -purN new/u-boot/include/asm-arm/arch-arm720t/s3c4510b.h u-boot/include/asm-arm/arch-arm720t/s3c4510b.h
--- new/u-boot/include/asm-arm/arch-arm720t/s3c4510b.h 2004-07-01 09:30:48.000000000 -0700
+++ u-boot/include/asm-arm/arch-arm720t/s3c4510b.h 2004-07-06 10:49:13.000000000 -0700
@@ -210,6 +210,11 @@
#define PUT__U8(reg, val) (*((volatile u8 *)(reg)) = (( u8)((val)&0xFF)))
#define GET__U8(reg) (*((volatile u8 *)(reg)))
+#define PUT_LED(val) (PUT_REG(REG_IOPDATA, (~val)&0xFF))
+#define GET_LED() ((~GET_REG( REG_IOPDATA)) & 0xFF)
+#define SET_LED(val) { u32 led = GET_LED(); led |= 1 << (val); PUT_LED( led); }
+#define CLR_LED(val) { u32 led = GET_LED(); led &= ~(1 << (val)); PUT_LED( led); }
+
/***********************************/
/* CLOCK CONSTANTS -- 50 MHz Clock */
/***********************************/
@@ -228,4 +233,42 @@
#define TM1_TOGGLE 0x10 /* 0, interval mode */
#define TM1_OUT_1 0x20 /* Timer 0 Initial TOUT0 value */
+
+/*********************************/
+/* INTERRUPT SOURCES */
+/*********************************/
+#define INT_EXTINT0 0
+#define INT_EXTINT1 1
+#define INT_EXTINT2 2
+#define INT_EXTINT3 3
+#define INT_UARTTX0 4
+#define INT_UARTRX0 5
+#define INT_UARTTX1 6
+#define INT_UARTRX1 7
+#define INT_GDMA0 8
+#define INT_GDMA1 9
+#define INT_TIMER0 10
+#define INT_TIMER1 11
+#define INT_HDLCTXA 12
+#define INT_HDLCRXA 13
+#define INT_HDLCTXB 14
+#define INT_HDLCRXB 15
+#define INT_BDMATX 16
+#define INT_BDMARX 17
+#define INT_MACTX 18
+#define INT_MACRX 19
+#define INT_IIC 20
+#define INT_GLOBAL 21
+#define N_IRQS (21)
+
+#ifndef __ASSEMBLER__
+struct _irq_handler {
+ void *m_data;
+ void (*m_func)( void *data);
+};
+
+extern struct _irq_handler IRQ_HANDLER[];
+
+#endif
+
#endif /* __S3C4510_h */
diff -purN new/u-boot/include/configs/evb4510.h u-boot/include/configs/evb4510.h
--- new/u-boot/include/configs/evb4510.h 2004-07-01 09:30:48.000000000 -0700
+++ u-boot/include/configs/evb4510.h 2004-07-06 09:51:25.000000000 -0700
@@ -44,7 +44,9 @@
#define CONFIG_S3C4510B 1 /* it's a S3C4510B chip */
#define CONFIG_EVB4510 1 /* on an EVB4510 Board */
-#undef CONFIG_USE_IRQ /* don't need them anymore */
+#define CONFIG_USE_IRQ
+#define CONFIG_STACKSIZE_IRQ (4*1024)
+#define CONFIG_STACKSIZE_FIQ (4*1024)
/*
* Size of malloc() pool
@@ -63,7 +65,7 @@
/*
* select serial console configuration
*/
-#define CONFIG_SERIAL1 2 /* we use Serial line 2, could also use 1 */
+#define CONFIG_SERIAL1 1 /* we use Serial line 1, could also use 2 */
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
@@ -83,10 +85,9 @@
#define CONFIG_SERVERIP 10.0.0.1
#define CONFIG_CMDLINE_TAG /* submit bootargs to kernel */
-/*#define CONFIG_BOOTDELAY 10*/
-/* args and cmd for uClinux-image @ 0x10020000, ramdisk-image @ 0x100a0000 */
-#define CONFIG_BOOTCOMMAND "bootm 0x10020000 0x100a0000"
-#define CONFIG_BOOTARGS "console=ttyS0,19200 initrd=0x100a0040,530K root=/dev/ram keepinitrd"
+#define CONFIG_BOOTDELAY 2
+#define CONFIG_BOOTCOMMAND "tftp 100000 uImage"
+/* #define CONFIG_BOOTARGS "console=ttyS0,19200 initrd=0x100a0040,530K root=/dev/ram keepinitrd" */
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 19200 /* speed to run kgdb serial port */
@@ -103,6 +104,10 @@
#define CFG_MAXARGS 16 /* max number of command args */
#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+#define CONFIG_CMDLINE_TAG /* allow passing of command line args to linux */
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
+
#define CFG_MEMTEST_START 0x00000000 /* memtest works on */
#define CFG_MEMTEST_END 0x00780000 /* 4 ... 8 MB in DRAM */
@@ -110,7 +115,8 @@
#define CFG_LOAD_ADDR 0x00000000 /* default load address */
-#define CFG_HZ 50000000 /* decrementer freq: 50 MHz */
+#define CFG_SYS_CLK_FREQ 50000000 /* CPU freq: 50 MHz */
+#define CFG_HZ 1000 /* decrementer freq: 1 KHz */
/* valid baudrates */
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
@@ -159,6 +165,6 @@
#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x20000) /* environment start address */
#define CFG_ENV_SECT_SIZE 0x10000 /* Total Size of Environment Sector */
-#define CFG_ENV_SIZE 0x4000 /* max size for environment */
+#define CFG_ENV_SIZE 0x1000 /* max size for environment */
#endif /* __CONFIG_H */
diff -purN new/u-boot/lib_arm/armlinux.c u-boot/lib_arm/armlinux.c
--- new/u-boot/lib_arm/armlinux.c 2004-04-18 15:26:18.000000000 -0700
+++ u-boot/lib_arm/armlinux.c 2004-07-06 09:53:50.000000000 -0700
@@ -166,13 +166,13 @@ void do_bootm_linux (cmd_tbl_t *cmdtp, i
do_reset (cmdtp, flag, argc, argv);
}
-#ifdef CONFIG_B2
+#if defined(CONFIG_B2) || defined(CONFIG_EVB4510)
/*
*we need to copy the ramdisk to SRAM to let Linux boot
*/
memmove ((void *) ntohl(hdr->ih_load), (uchar *)data, len);
data = ntohl(hdr->ih_load);
-#endif /* CONFIG_B2 */
+#endif /* CONFIG_B2 || CONFIG_EVB4510 */
/*
* Now check if we have a multifile image
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