[U-Boot-Users] [PATCH] ARM720t -- Relocating Exception Vectors

[Curt Brune]

This patch is for cpu/arm720t/start.S -- The patch relocates the
exception vectors to RAM address 0x0.

See previous posting about relocating ARM exception vectors for a
discussion of the problem.

Cheers,
Curt

-- 

========================================================================
 Curt Brune           | Phone   1.650.380.2528 |     Managing Principal
 curt at cucy.com        | WWW       www.cucy.com |           Cucy Systems
========================================================================
             Cucy Systems -- Software. Integration. Training.
========================================================================
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diff -purN new/u-boot/cpu/arm720t/start.S u-boot/cpu/arm720t/start.S
--- new/u-boot/cpu/arm720t/start.S	2004-07-01 09:30:47.000000000 -0700
+++ u-boot/cpu/arm720t/start.S	2004-07-06 16:57:34.000000000 -0700
@@ -160,6 +160,35 @@ clbss_l:str	r2, [r0]		/* clear loop...  
 	cmp	r0, r1
 	bne	clbss_l
 
+	/* 
+	 * When using interrupts make sure the exception vectors are
+	 * at address 0x0.  It's possible that u-boot was relocated
+	 * from FLASH (address 0x0) to RAM (address TEXT_BASE) and the
+	 * FLASH re-mapped elsewhere.  In this case the exception
+	 * vectors would no longer be at address 0x0, they would be
+	 * where ever FLASH and RAM were re-mapped to.
+	 */
+	ldr     r0, _TEXT_BASE
+	ldr     r1, =0x0
+	cmp     r0, r1                  /* everything is fine if TEXT_BASE is 0x0 */
+	beq     go_start
+
+	/* 
+	 * Otherwise copy the exception vectors (and associated data)
+	 * from flash to 0x0.
+	 */
+	adr r2, _start		
+	adr r3, _fiq
+	sub r2, r3, r2
+	add r2, r2, #8
+
+vec_copy_loop:
+	ldr     r4, [r0], #4
+	str     r4, [r1], #4
+	cmp	r2, r1
+	bne	vec_copy_loop
+	
+go_start:
 	ldr	pc, _start_armboot
 
 _start_armboot:	.word start_armboot