[U-Boot-Users] Memory Caching in Interrupt mode

[Wolfgang Denk]

In message <20040310020510.99183.qmail at web12009.mail.yahoo.com> you wrote:
>
> As a general rule should the caches (data /
> instruction) be enabled or disabled?

There is no general rule. It depends on the architecture / processor.

> I noticed in the MIPS code that the caches were being
> enabled.

If you don't have any on-chip memory or SRAM or so which can be  used
for intiial data and stack, the "memopry-in-data-cache" trick must be
used, and then you obviously have to enable the DC.

IC should always be on.

Best regards,

Wolfgang Denk

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