[U-Boot-Users] Memory Caching in Interrupt mode

[Doug Kehn]

--- Wolfgang Denk <wd at denx.de> wrote:
> > Whats the work around for this problem ?
> 
> Do not enable data cache.
> 
> > 2. Or shall i disable the data caches while
> processing interrupts ?
> 
> Don't enable DC at all.
> 

As a general rule should the caches (data /
instruction) be enabled or disabled?

I noticed in the MIPS code that the caches were being
enabled.

Thanks...


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