[U-Boot-Users] ppc440gx

[Carl Riechers]

Make sure you have your SDRAM setting set properly. 
Did you do your timing analysis?  If your custom board
has the SDRAM very close to the processor you will
need to set your clock phase advance in the 45 to 70
degree range.  My board would generate inconsistent
exceptions with the IBM recommended 90 phase advance
setting.

Good luck,
Carl

--- "Barbier, Renaud (GE Infrastructure)"
<Renaud.Barbier at ge.com> wrote:

> I am trying to get U-boot on a custome ppc440gx
> board (CPU, 64MB RAM and the 2 gigabit port).
> 
> I have a problem, I am receiving this exception
> below. This happen when the EE bit is set in
> interrupt_init.
> 
> kgdb: handle_exception; trap [0xb00]
> 
> I am not sure what is the source of this exception.
> (decrementer should be 0x900)
> 
> Before that I was getting exception 0x500(external
> interrupt) and trace it to the UIC
> registers(polarity, trigger,...) being cleared
> (where?).
> So I restore their value in interrrupt_init_cpu.  
> 
> 
> Note that I have run vxWorks and Linux on this
> board. I could believe I broke something.
> 
> 
> 
> -----Original Message-----
> From: u-boot-users-admin at lists.sourceforge.net
> [mailto:u-boot-users-admin at lists.sourceforge.net]On
> Behalf Of
> philipv at cam.org
> Sent: Thursday, September 02, 2004 3:29 PM
> To: u-boot-users at lists.sourceforge.net
> Subject: [U-Boot-Users] Booting in IPv6
> 
> 
> 
> Is there any support planned or in progress for
> booting in an IPv6 network?
> 
> Philip
> 
> 
> 
> 
>
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