[U-Boot-Users] AT91RM9200 Errata (Was: CSB637 support - big bug..)

[Anders Larsen]

"Martin Krause" <Martin.Krause at tqs.de> schreibt:
>I already posted this on the list, but a little reminder won't hurt :)
>
>A clock rate > 180 MHz could be problematic. According errata 42 
>(AC Characteristics: PLL Frequency Limitation), in AT91RM9200 errata 
>sheet (doc6015) the PLL is limited to 180 MHz. We already had problems 
>with this bug (with about 10%-15% of the CPUs). After configuring the
>PLL for 179 MHz no errors occour any mor (before we used 207 MHz).

Hi,

207 MHz is way beyond the limit - the 184 MHz of the CSB637 was
specified by Cogent, so /they/ are responsible for selecting chips
that can handle that frequency  :-)

Cheers
 Anders